Inventor profile of:

Kuo Lung Pan

City:

Hsinchu

Country:

Taiwan

Published Applications:

72

Last publication date:

2026-05-14

Top Assignees for applications by Kuo Lung Pan

The entities that hold a legal rights for patent applications filed by inventor Pan Kuo Lung:

Recent patent applications by Pan Kuo Lung

Kuo Lung Pan from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-05-14
US20260136971A1
Electricity

PACKAGES WITH THICK RDLS AND THIN RDLS STACKED ALTERNATINGLY

#2 | 2025-11-13
US20250349732A1
Electricity

SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME

#3 | 2025-10-30
US20250336784A1
Electricity

INTEGRATED CIRCUIT PACKAGE AND METHOD

#4 | 2025-10-23
US20250329703A1
Electricity

TRIMMING AND SAWING PROCESSES IN THE FORMATION OF WAFER-FORM PACKAGES

#5 | 2025-10-16
US20250323211A1
Electricity

Integrated Circuit Package and Method

#6 | 2025-09-25
US20250300145A1
Electricity

INTEGRATED FAN-OUT PACKAGES AND METHODS OF FORMING THE SAME

#7 | 2025-03-20
US20250096163A1
Electricity

INTEGRATED CIRCUIT STRUCTURE AND METHOD

#8 | 2024-11-28
US20240395769A1
Electricity

BONDING PASSIVE DEVICES ON ACTIVE DIES TO FORM 3D PACKAGES

#9 | 2024-11-07
US20240371726A1
Electricity

Integrated Circuit Package and Method

#10 | 2024-10-24
US20240355754A1
Electricity

PACKAGES WITH THICK RDLS AND THIN RDLS STACKED ALTERNATINGLY

#11 | 2024-09-05
US20240297114A1
Electricity

METHODS OF FORMING SEMICONDUCTOR PACKAGES

#12 | 2024-06-20
US20240203936A1
Electricity

SEMICONDUCTOR STRUCTURE

#13 | 2024-04-04
US20240113071A1
Electricity

Integrated Circuit Package and Method

#14 | 2024-02-29
US20240071981A1
Electricity

Method of fabricating semiconductor structure including a barrier structure in between a plurality of surface mount components and a wafer

#15 | 2024-02-22
US20240063075A1
Electricity

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

#16 | 2024-02-08
US20240047332A1
Electricity

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

#17 | 2024-01-18
US20240019486A1
Physics

Alignment Mark Design for Wafer-Level Testing and Method Forming the Same

#18 | 2023-11-16
US20230369254A1
Electricity

Integrated circuit structure and method

#19 | 2023-09-28
US20230307375A1
Electricity

Semiconductor Package and Method of Forming the Same

#20 | 2023-09-14
US20230290731A1
Electricity

Chip package and method of forming the same

#21 | 2023-07-13
US20230223382A1
Electricity

Semiconductor package and manufacturing method of semiconductor package

#22 | 2023-06-08
US20230178536A1
Electricity

Trimming and Sawing Processes in the Formation of Wafer-Form Packages

#23 | 2023-04-06
US20230103560A1
Electricity

Integrated circuit packages having support rings

#24 | 2023-03-23
US20230090895A1
Electricity

Methods of forming semiconductor packages

#25 | 2023-03-02
US20230068263A1
Electricity

Semiconductor structure and method of forming the same

#26 | 2023-02-16
US20230053190A1
Electricity

Integrated Circuit Package and Method

#27 | 2022-12-29
US20220415737A1
Electricity

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

#28 | 2022-12-01
US20220384411A1
Electricity

Multi-chip semiconductor package

#29 | 2022-11-10
US20220359403A1
Electricity

Packages with thick RDLs and thin RDLs stacked alternatingly

#30 | 2022-11-10
US20220359344A1
Electricity

Integrated circuit package and method

#31 | 2022-11-10
US20220359343A1
Electricity

Package structure

#32 | 2022-10-27
US20220344287A1
Electricity

Integrated circuit structure and method

#33 | 2022-10-20
US20220336410A1
Electricity

Bonding passive devices on active dies to form 3D packages

#34 | 2022-10-20
US20220336404A1
Electricity

Semiconductor structure including a semiconductor wafer and a surface mount component overhanging a periphery of the semiconductor wafer

#35 | 2022-08-18
US20220262758A1
Electricity

Package structure and manufacturing method of package structure thereof

#36 | 2022-08-04
US20220246590A1
Electricity

Integrated Fan-Out Packages and Methods of Forming the Same

#37 | 2022-05-19
US20220157689A1
Electricity

Package structure and method of manufacturing the same

#38 | 2022-03-31
US20220102283A1
Electricity

Chip package and method of forming the same

#39 | 2022-03-10
US20220077102A1
Electricity

Semiconductor structure including a first surface mount component and a second surface mount component and method of fabricating the semiconductor structure

#40 | 2022-02-03
US20220037228A1
Electricity

Package structure

#41 | 2022-01-13
US20220013422A1
Electricity

Package structure and method of forming the same

#42 | 2021-12-23
US20210398905A1
Electricity

Packages with thick RDLs and thin RDLs stacked alternatingly

#43 | 2021-12-16
US20210391270A1
Electricity

Segregated power and ground design for yield improvement

#44 | 2021-10-21
US20210327806A1
Electricity

Semiconductor package and method

#45 | 2021-09-30
US20210305212A1
Electricity

Semiconductor package and manufacturing method of semiconductor package

#46 | 2021-08-26
US20210265228A1
Electricity

Integrated circuit package and method

#47 | 2021-08-05
US20210242159A1
Electricity

Package structure and manufacturing method of package structure thereof

#48 | 2021-07-29
US20210233835A1
Electricity

Integrated circuit package and method

#49 | 2021-07-01
US20210202391A1
Electricity

Segregated power and ground design for yield improvement

#50 | 2021-03-25
US20210091059A1
Electricity

Multi-chip semiconductor package

#51 | 2021-03-04
US20210066242A1
Electricity

Bonding passive devices on active device dies to form 3D packages

#52 | 2021-01-21
US20210020538A1
Electricity

Package structure and method of manufacturing the same

#53 | 2020-12-17
US20200395257A1
Electricity

Integrated circuit package and method

#54 | 2020-09-03
US20200279784A1
Electricity

Chip package and method of forming the same

#55 | 2020-08-06
US20200251407A1
Electricity

Integrated fan-out package

#56 | 2020-07-30
US20200243429A1
Electricity

Integrated circuit package and method

#57 | 2020-07-02
US20200212018A1
Electricity

Integrated circuit package and method

#58 | 2020-07-02
US20200211922A1
Electricity

Method of forming integrated circuit packages with mechanical braces

#59 | 2020-05-19
US16281094
Electricity

Chip package and method of forming the same

#60 | 2020-03-19
US20200091114A1
Electricity

Semiconductor package and manufacturing method of semiconductor package

#61 | 2020-03-05
US20200075562A1
Electricity

Integrated fan-out packages and methods of forming the same

#62 | 2020-01-02
US20200006220A1
Electricity

Semiconductor package and method

#63 | 2019-10-10
US20190312018A1
Electricity

Multi-chip semiconductor package

#64 | 2019-05-02
US20190131223A1
Electricity

Semiconductor packages and methods of forming the same

#65 | 2019-04-25
US20190123021A1
Electricity

Dual-sided integrated fan-out package

#66 | 2018-08-16
US20180233382A1
Electricity

Chip package with fan-out structure

#67 | 2018-04-26
US20180111827A1
Performing operations; transporting

Integrated circuit package and method of forming same

#68 | 2017-11-30
US20170345788A1
Electricity

Warpage control of semiconductor die package

#69 | 2017-11-02
US20170316957A1
Electricity

Structure and formation method of chip package with fan-out structure

#70 | 2017-07-27
US20170213808A1
Electricity

Dual-sided integrated fan-out package

#71 | 2017-06-29
US20170186681A1
Electricity

Packaging device having plural microstructures disposed proximate to die mounting region

#72 | 2017-05-30
US14981600
Electricity

Semiconductor device

InventorID:

1918654 ⎘