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Inventor profile of:

Jack C. Lee

City:

Austin, Texas

Country:

United States

Published Applications:

7

Last publication date:

2021-12-30

Top Assignees for applications by Jack C. Lee

The entities that hold a legal rights for patent applications filed by inventor Lee Jack C.:

  • The Board of Regents of the University of Texas System 3 Austin, TX United States
  • Board of Regents, The University of Texas System 3 Austin, TX United States

Recent patent applications by Lee Jack C.

Jack C. Lee from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-12-30
US20210408372A1
Electricity

NON-VOLATILE RESISTANCE SWITCHING IN MONOSLAYER ATOMIC SHEETS

#2 | 2018-04-19
US20180108761A1
Electricity

Tunnel field-effect transistor (TFET) with lateral oxidation

#3 | 2016-06-09
US20160163840A1
Electricity

Tunnel field effect transistor (TFET) with lateral oxidation

#4 | 2015-12-17
US20150364572A1
Electricity

Vertical III-V nanowire field-effect transistor using nanosphere lithography

#5 | 2015-03-05
US20150060957A1
Electricity

Three-dimensional gate-wrap-around field-effect transistor

#6 | 2015-02-26
US20150053929A1
Electricity

VERTICAL III-V NANOWIRE FIELD-EFFECT TRANSISTOR USING NANOSPHERE LITHOGRAPHY

#7 | 2013-04-18
US20130093497A1
Electricity

Tunnel field effect transistor (TFET) with lateral oxidation

InventorID:

194035 ⎘

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