Inventor profile of:

Shih-Lien Linus Lu

City:

Hsinchu

Country:

Taiwan

Published Applications:

211

Last publication date:

2026-05-21

Top Assignees for applications by Shih-Lien Linus Lu

The entities that hold a legal rights for patent applications filed by inventor Lu Shih-Lien Linus:

Recent patent applications by Lu Shih-Lien Linus

Shih-Lien Linus Lu from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-05-21
US20260143714A1
Electricity

METHOD OF FORMING MEMORY DEVICE

#2 | 2026-04-16
US20260105944A1
Physics

FERROELECTRIC FET-BASED CONTENT ADDRESSABLE MEMORY

#3 | 2025-12-25
US20250392458A1
Electricity

INTEGRATED CIRCUIT (IC) SIGNATURES WITH RANDOM NUMBER GENERATOR AND ONE-TIME PROGRAMMABLE DEVICE

#4 | 2025-12-11
US20250379161A1
Electricity

Integrated Circuit Layout, Integrated Circuit, and Method for Fabricating the Same

#5 | 2025-11-27
US20250363249A1
Physics

Systems and Methods for Classifying PUF Signature Modules of Integrated Circuits

#6 | 2025-10-23
US20250329377A1
Physics

MEMORY CIRCUIT AND WRITE METHOD

#7 | 2025-09-25
US20250299732A1
Physics

SYSTEMS AND METHODS TO STORE MULTI-LEVEL DATA

#8 | 2025-08-14
US20250260587A1
Electricity

PHYSICAL UNCLONABLE FUNCTION (PUF) SECURITY KEY GENERATION

#9 | 2025-07-10
US20250228039A1
Electricity

THIN FILM TRANSISTOR BASED LIGHT SENSOR

#10 | 2025-06-12
US20250191629A1
Physics

BUFFER CONTROL OF MULTIPLE MEMORY BANKS

#11 | 2025-06-12
US20250190305A1
Physics

INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME

#12 | 2025-05-01
US20250140311A1
Physics

SRAM POWER-UP RANDOM NUMBER GENERATOR

#13 | 2025-04-17
US20250124209A1
Physics

PUF CELL ARRAY, SYSTEM AND METHOD OF MANUFACTURING SAME

#14 | 2025-04-03
US20250112794A1
Electricity

METHOD AND APPARATUS FOR NOISE INJECTION FOR PUF GENERATOR CHARACTERIZATION

#15 | 2025-03-27
US20250106048A1
Electricity

METHODS TO HIDE OTP CONTENT

#16 | 2025-03-06
US20250078919A1
Physics

METHOD OF OPERATING AN INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT

#17 | 2025-03-06
US20250078890A1
Physics

MEMORY DEVICE HAVING BITLINE SEGMENTED INTO BITLINE SEGMENTS AND RELATED METHOD FOR OPERATING MEMORY DEVICE

#18 | 2025-02-20
US20250061018A1
Physics

MEMORY ADDRESS PROTECTION CIRCUIT AND METHOD OF OPERATING SAME

#19 | 2024-12-19
US20240420760A1
Physics

MEMORY DEVICE

#20 | 2024-11-28
US20240396749A1
Electricity

DEVICE SIGNATURE BASED ON TRIM AND REDUNDANCY INFORMATION

#21 | 2024-11-21
US20240389335A1
Electricity

MEMORY DEVICE AND METHOD OF FORMING THE SAME

#22 | 2024-11-21
US20240389332A1
Electricity

SEMICONDUCTOR STRUCTURE

#23 | 2024-11-21
US20240388311A1
Electricity

TWO-LEVEL ERROR CORRECTING CODE WITH SHARING OF CHECK-BITS

#24 | 2024-11-21
US20240387753A1
Electricity

THIN FILM TRANSISTOR BASED LIGHT SENSOR

#25 | 2024-11-21
US20240387407A1
Electricity

MULTIPLEXER CELL AND SEMICONDUCTOR DEVICE HAVING CAMOUFLAGE DESIGN, AND METHOD FOR FORMING MULTIPLEXER CELL

#26 | 2024-11-21
US20240386982A1
Physics

METHOD OF TESTING A MEMORY CIRCUIT AND MEMORY CIRCUIT

#27 | 2024-11-21
US20240385056A1
Physics

THIN FILM TRANSISTOR BASED TEMPERATURE SENSOR

#28 | 2024-11-07
US20240371853A1
Electricity

MEMORY CELL ARRAY AND METHOD OF OPERATING SAME

#29 | 2024-11-07
US20240371674A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#30 | 2024-10-31
US20240365554A1
Electricity

MEMORY DEVICE

#31 | 2024-10-31
US20240363171A1
Physics

METHOD AND APPARATUS FOR PUF GENERATOR CHARACTERIZATION

#32 | 2024-10-17
US20240348435A1
Electricity

INTEGRATED CIRCUIT (IC) SIGNATURES WITH RANDOM NUMBER GENERATOR AND ONE-TIME PROGRAMMABLE DEVICE

#33 | 2024-09-12
US20240305481A1
Electricity

PHYSICALLY UNCLONABLE FUNCTION (PUF) GENERATION

#34 | 2024-09-12
US20240304230A1
Physics

DEVICE AND METHOD FOR PERFORMING MATRIX OPERATION

#35 | 2024-08-01
US20240256451A1
Physics

METHOD FOR COPYING DATA WITHIN MEMORY DEVICE, MEMORY DEVICE, AND ELECTRONIC DEVICE THEREOF

#36 | 2024-07-18
US20240242763A1
Physics

SYSTEMS AND METHODS TO STORE MULTI-LEVEL DATA

#37 | 2024-07-18
US20240242750A1
Physics

FERROELECTRIC FET-BASED CONTENT-ADDRESSABLE MEMORY

#38 | 2024-06-27
US20240214226A1
Electricity

I/O CIRCUIT DESIGN FOR SRAM-BASED PUF GENERATORS

#39 | 2024-06-20
US20240202374A1
Physics

Method and apparatus for protecting a PUF generator

#40 | 2024-05-16
US20240161797A1
Physics

INTEGRATED CIRCUIT DEVICE AND METHODS

#41 | 2024-05-09
US20240154823A1
Electricity

Method and apparatus for noise injection for PUF generator characterization

#42 | 2024-05-02
US20240143845A1
Physics

Systems and Methods for Classifying PUF Signature Modules of Integrated Circuits

#43 | 2024-03-14
US20240089127A1
Electricity

Physical unclonable function (PUF) security key generation

#44 | 2024-03-14
US20240089126A1
Electricity

Device signature based on trim and redundancy information

#45 | 2024-03-14
US20240087624A1
Physics

Buffer control of multiple memory banks

#46 | 2024-03-07
US20240079257A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#47 | 2024-02-29
US20240071957A1
Electricity

Integrated circuit layout, integrated circuit, and method for fabricating the same

#48 | 2024-01-11
US20240013828A1
Physics

Memory device having bitline segmented into bitline segments and related method for operating memory device

#49 | 2023-11-30
US20230388135A1
Electricity

Method and apparatus for logic cell-based PUF generators

#50 | 2023-11-30
US20230385459A1
Physics

Systems and Methods for Classifying PUF Signature Modules of Integrated Circuits

#51 | 2023-11-30
US20230385145A1
Physics

Memory address protection circuit including an error detection circuit and method of operating same

#52 | 2023-11-30
US20230384171A1
Physics

CAPACITOR-BASED TEMPERATURE-SENSING DEVICE

#53 | 2023-11-23
US20230377671A1
Physics

Method of testing a memory circuit and memory circuit

#54 | 2023-11-23
US20230376669A1
Physics

PUF cell array, system and method of manufacturing same

#55 | 2023-11-23
US20230376378A1
Physics

Integrated circuit and method of operating same

#56 | 2023-11-16
US20230371267A1
Electricity

Semiconductor structure and method of fabricating the same

#57 | 2023-11-16
US20230369251A1
Electricity

Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell

#58 | 2023-11-16
US20230367673A1
Physics

System and method of reducing logic for multi-bit error correcting codes

#59 | 2023-10-19
US20230333949A1
Physics

Memory block age detection

#60 | 2023-08-31
US20230273752A1
Physics

Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals

#61 | 2023-08-03
US20230246018A1
Electricity

Memory cell array and method of operating same

#62 | 2023-08-03
US20230245696A1
Physics

SRAM power-up random number generator

#63 | 2023-07-27
US20230238057A1
Physics

Method of operating an integrated circuit and integrated circuit

#64 | 2023-06-15
US20230189529A1
Electricity

Memory device and method of forming the same

#65 | 2023-04-20
US20230121502A1
Electricity

Integrated circuit (IC) signatures with random number generator and one-time programmable device

#66 | 2023-04-13
US20230113508A1
Physics

Method for copying data within memory device, memory device, and electronic device thereof

#67 | 2023-04-06
US20230106743A1
Electricity

Physically unclonable function (PUF) generation

#68 | 2023-03-16
US20230083088A1
Physics

MEMORY CIRCUIT AND WRITE METHOD

#69 | 2023-03-02
US20230061108A1
Physics

Thin film transistor based temperature sensor

#70 | 2023-02-16
US20230049649A1
Electricity

Method and apparatus for protecting embedded software

#71 | 2023-01-26
US20230022719A1
Physics

Method and apparatus for PUF generator characterization

#72 | 2023-01-19
US20230015557A1
Physics

Buffer control of multiple memory banks

#73 | 2022-12-01
US20220382913A1
Physics

Systems and methods for classifying PUF signature modules of integrated circuits

#74 | 2022-11-24
US20220374576A1
Physics

PUF cell array, system and method of manufacturing same

#75 | 2022-11-17
US20220368354A1
Electricity

Two-level error correcting code with sharing of check-bits

#76 | 2022-11-17
US20220366972A1
Physics

Systems and methods to store multi-level data

#77 | 2022-11-17
US20220365846A1
Physics

Integrated circuit and method of operating same

#78 | 2022-11-10
US20220360456A1
Electricity

Systems and Methods for Providing Reliable Physically Unclonable Functions

#79 | 2022-11-10
US20220358978A1
Physics

Integrated circuit device and methods

#80 | 2022-10-27
US20220343032A1
Physics

Method and apparatus for protecting a PUF generator

#81 | 2022-10-20
US20220334916A1
Physics

Memory address protection circuit and method of operating same

#82 | 2022-09-22
US20220301613A1
Physics

Device and method for performing matrix operation

#83 | 2022-08-18
US20220263667A1
Electricity

Device signature based on trim and redundancy information

#84 | 2022-08-18
US20220262418A1
Physics

Memory device having bitline segmented into bitline segments and related method for operating memory device

#85 | 2022-08-04
US20220246548A1
Electricity

Integrated circuit layout, integrated circuit, and method for fabricating the same

#86 | 2022-08-04
US20220245023A1
Physics

Detection and correction of data bit errors using error correction codes

#87 | 2022-07-21
US20220231051A1
Electricity

Semiconductor structure and method of fabricating the same

#88 | 2022-07-21
US20220231050A1
Electricity

Memory device and method of forming the same

#89 | 2022-07-21
US20220229750A1
Physics

Memory block age detection

#90 | 2022-07-07
US20220214943A1
Physics

Method of correcting errors in a memory array and method of screening weak bits in the same

#91 | 2022-05-19
US20220157375A1
Physics

Memory device

#92 | 2022-05-19
US20220156189A1
Physics

Method for copying data within memory device, memory device, and electronic device thereof

#93 | 2022-04-14
US20220115337A1
Electricity

Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell

#94 | 2022-03-03
US20220066871A1
Physics

Integrated circuit and method of operating same

#95 | 2022-02-17
US20220051706A1
Physics

Buffer control of multiple memory banks

#96 | 2022-01-20
US20220020427A1
Physics

Method of operating an integrated circuit and integrated circuit

#97 | 2022-01-13
US20220014213A1
Electricity

Two-level error correcting code with sharing of check-bits

#98 | 2022-01-06
US20220005830A1
Electricity

Memory device and method of forming the same

#99 | 2021-12-30
US20210409233A1
Electricity

PUF method and structure

#100 | 2021-12-28
US16934782
Electricity

Multiplexer cell and semiconductor device having camouflage design, and method for forming multiplexer cell

InventorID:

1996357 ⎘