Inventor profile of:

SAMEER KUMAR

City:

WHITE PLAINS, New York

Country:

United States

Published Applications:

22

Last publication date:

2019-08-08

Top Assignees for applications by SAMEER KUMAR

The entities that hold a legal rights for patent applications filed by inventor KUMAR SAMEER:

Recent patent applications by KUMAR SAMEER

SAMEER KUMAR from WHITE PLAINS, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2019-08-08
US20190245799A1
Electricity

Reliability processing of remote direct memory access

#2 | 2019-06-27
US20190199653A1
Electricity

Reduced number of counters for reliable messaging

#3 | 2017-07-06
US20170195212A1
Electricity

Mechanism to extend the remote get to do async rectangle broadcast on a rectangle with wild cards in the packet header

#4 | 2013-12-19
US20130339506A1
Physics

Performing synchronized collective operations over multiple process groups

#5 | 2013-12-19
US20130339499A1
Physics

Performing synchronized collective operations over multiple process groups

#6 | 2013-11-21
US20130312011A1
Physics

Processing posted receive commands in a parallel computer

#7 | 2013-11-21
US20130312010A1
Physics

Processing posted receive commands in a parallel computer

#8 | 2013-05-02
US20130110901A1
Electricity

Completion processing for data communications instructions

#9 | 2013-04-18
US20130097263A1
Physics

Completion processing for data communications instructions

#10 | 2012-07-12
US20120179760A1
Physics

Completion processing for data communications instructions

#11 | 2012-07-12
US20120179736A1
Electricity

Completion processing for data communications instructions

#12 | 2011-10-27
US20110265098A1
Physics

Message passing with queues and channels

#13 | 2011-10-06
US20110246582A1
Physics

Message passing with queues and channels

#14 | 2011-07-21
US20110179229A1
Physics

Store-operate-coherence-on-value

#15 | 2011-03-24
US20110072241A1
Physics

Fast concurrent array-based stacks, queues and deques using fetch-and-increment-bounded, fetch-and-decrement-bounded and store-on-twin synchronization primitives

#16 | 2011-01-13
US20110010471A1
Physics

Recording a communication pattern and replaying messages in a parallel computing system

#17 | 2010-10-21
US20100268852A1
Physics

Replenishing data descriptors in a DMA injection FIFO buffer

#18 | 2009-01-01
US20090007141A1
Physics

Message passing with a limited number of DMA byte counters

#19 | 2009-01-01
US20090006810A1
Physics

Mechanism to support generic collective communication across a variety of programming models

#20 | 2009-01-01
US20090003344A1
Electricity

Asynchronous broadcast for ordered delivery between compute nodes in a parallel computing system where packet header space is limited

#21 | 2008-12-18
US20080313376A1
Electricity

Heuristic status polling

#22 | 2008-12-11
US20080307121A1
Physics

Direct memory access transfer completion notification

InventorID:

201369 ⎘