Inventor profile of:

DWAIN A. HICKS

City:

PFLUGERVILLE, Texas

Country:

United States

Published Applications:

14

Last publication date:

2021-02-18

Top Assignees for applications by DWAIN A. HICKS

The entities that hold a legal rights for patent applications filed by inventor HICKS DWAIN A.:

Recent patent applications by HICKS DWAIN A.

DWAIN A. HICKS from PFLUGERVILLE, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-02-18
US20210049107A1
Physics

Methods and systems for optimized translation of a virtual address having multiple virtual address portions using multiple translation lookaside buffer (TLB) arrays for variable page sizes

#2 | 2020-08-27
US20200272557A1
Physics

Virtual cache mechanism for program break point register exception handling

#3 | 2020-06-18
US20200192817A1
Physics

Methods and systems for predicting virtual address

#4 | 2020-06-11
US20200183858A1
Physics

Methods and systems for incorporating non-tree based address translation into a hierarchical translation lookaside buffer (TLB)

#5 | 2020-06-04
US20200174793A1
Physics

Performance optimized congruence class matching for multiple concurrent radix translations

#6 | 2020-04-30
US20200133881A1
Physics

Methods and systems for optimized translation of a virtual address having multiple virtual address portions using multiple translation lookaside buffer (TLB) arrays for variable page sizes

#7 | 2020-04-23
US20200125496A1
Physics

Operation of a multi-slice processor implementing a unified page walk cache

#8 | 2020-04-14
US16210074
Physics

Methods and systems for incorporating non-tree based address translation into a hierarchical translation lookaside buffer (TLB)

#9 | 2018-10-11
US20180293126A1
Physics

Operation of a multi-slice processor implementing exception handling in a nested translation environment

#10 | 2017-10-26
US20170308474A1
Physics

Operation of a multi-slice processor implementing a unified page walk cache

#11 | 2017-10-26
US20170308425A1
Physics

Operation of a multi-slice processor implementing exception handling in a nested translation environment

#12 | 2008-06-19
US20080148017A1
Physics

Systems for executing load instructions that achieve sequential load consistency

#13 | 2006-05-18
US20060107021A1
Physics

Systems and methods for executing load instructions that avoid order violations

#14 | 2006-05-18
US20060106985A1
Physics

Method and systems for executing load instructions that achieve sequential load consistency

InventorID:

2022138 ⎘