Inventor profile of:

Niranjay Ravindran

City:

Rochester, Minnesota

Country:

United States

Published Applications:

50

Last publication date:

2025-12-25

Top Assignees for applications by Niranjay Ravindran

The entities that hold a legal rights for patent applications filed by inventor Ravindran Niranjay:

Recent patent applications by Ravindran Niranjay

Niranjay Ravindran from Rochester, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-12-25
US20250391513A1
Physics

Reference Marks Storing Embedded Oligo Index in DNA Data Storage

#2 | 2025-12-25
US20250391507A1
Physics

Embedded Reference Marks for Correcting Errors in DNA Data Storage

#3 | 2025-12-25
US20250391506A1
Physics

DNA Sequencing Using Viterbi-Like Correlation Analysis

#4 | 2025-06-12
US20250190307A1
Physics

Channel Circuit with Zero Force Equalizer

#5 | 2025-03-13
US20250088203A1
Electricity

Multi-Tier Error Correction Codes for DNA Data Storage

#6 | 2024-12-19
US20240420735A1
Physics

Data read synchronization from phase modulated synchronization fields in a data storage device

#7 | 2024-08-08
US20240265948A1
Physics

Modulation code and ECC rate optimization using symbol context mutual information

#8 | 2024-08-08
US20240265943A1
Physics

Data Storage Device Configuration Using Mutual Information

#9 | 2024-08-08
US20240264765A1
Physics

Global Variance Parameter Based on Mutual Information in a Data Channel

#10 | 2024-06-27
US20240211729A1
Physics

Multiple Neural Network Training Nodes in a Read Channel

#11 | 2024-06-06
US20240185959A1
Physics

Nested Error Correction Codes for DNA Data Storage

#12 | 2024-06-06
US20240184666A1
Physics

Preprocessing for Correcting Insertions and Deletions in DNA Data Storage

#13 | 2024-03-28
US20240106461A1
Electricity

Adjustable code rates and dynamic ECC in a data storage device with write verification

#14 | 2024-03-21
US20240097696A1
Electricity

Channel Circuit with Asynchronous Sampling from an Oversampled Analog-to-Digital Converter

#15 | 2024-03-21
US20240095121A1
Physics

Trained states equalizer in a read channel

#16 | 2024-01-04
US20240005959A1
Physics

Offset spiral data track format for data storage devices

#17 | 2023-12-07
US20230393937A1
Physics

Adjustable code rates and dynamic ECC in a data storage device

#18 | 2023-10-19
US20230335158A1
Physics

Sector metrics to estimate health of written data

#19 | 2023-09-28
US20230307000A1
Physics

Overlapping processing of data tracks

#20 | 2023-09-28
US20230306994A1
Physics

Position and risk reconstruction in shingled magnetic recording data storage devices

#21 | 2023-09-19
US17834219
Electricity

Extendable parity code matrix construction and utilization in a data storage device

#22 | 2023-06-29
US20230208445A1
Electricity

Signal correction using soft information in a data channel

#23 | 2023-06-13
US17683958
Electricity

Externalizing inter-symbol interference data in a data channel

#24 | 2022-11-24
US20220376711A1
Electricity

Neural network soft information detector in a read channel

#25 | 2022-09-08
US20220283950A1
Physics

Mapping for multi-state programming of memory devices

#26 | 2022-04-07
US20220107865A1
Physics

LDPC encoding for memory cells with arbitrary number of levels

#27 | 2022-03-31
US20220103188A1
Electricity

Data storage device channel encoding current data using redundancy bits generated over preceding data

#28 | 2021-11-11
US20210350825A1
Physics

Magnetic recording tape having embedded servo sectors on data tracks

#29 | 2021-10-21
US20210327504A1
Physics

Multi-level cell programming using optimized multiphase mapping with balanced gray code

#30 | 2021-10-14
US20210319837A1
Physics

Read level tracking and optimization

#31 | 2021-06-10
US20210175903A1
Electricity

Transformation of data to non-binary data for storage in non-volatile memories

#32 | 2020-10-22
US20200335173A1
Physics

Read level tracking and optimization

#33 | 2020-10-15
US20200327933A1
Physics

Multi-level cell programming using optimized multiphase mapping with balanced gray code

#34 | 2020-10-08
US20200320009A1
Physics

Mapping for multi-state programming of memory devices

#35 | 2020-08-18
US16655630
Physics

Data storage device aborting write operation based on accumulated track squeeze metric for adjacent data track

#36 | 2020-08-18
US16532717
Physics

Data storage device employing dynamic track trajectories

#37 | 2020-07-02
US20200210277A1
Physics

Data storage device employing multi-level parity sectors for data recovery procedure

#38 | 2020-06-18
US20200194063A1
Physics

Multi-level cell programming using optimized multiphase mapping with balanced Gray code

#39 | 2020-06-18
US20200192807A1
Physics

Mapping for multi-state programming of memory devices

#40 | 2020-04-16
US20200115555A1
Chemistry; metallurgy

Transformation of binary data to non-binary data for storage in non-volatile memory

#41 | 2020-04-09
US20200112322A1
Electricity

Multi-dimensional quasi-cyclic (QC) low-density parity-check (LDPC) code constructions

#42 | 2019-12-19
US20190384504A1
Physics

Write level optimization for non-volatile memory

#43 | 2019-11-21
US20190356334A1
Electricity

Data storage device employing memory efficient processing of un-converged codewords

#44 | 2019-11-21
US20190354434A1
Physics

Data storage device employing multi-level parity sectors for data recovery procedure

#45 | 2019-11-21
US20190354430A1
Physics

Data storage device emphasizing parity sector processing of un-converged codewords

#46 | 2019-08-15
US20190250987A1
Physics

Data storage device extending erasures for LDPC-type decoding

#47 | 2019-07-11
US20190214101A1
Physics

Read level tracking and optimization

#48 | 2018-12-27
US20180374550A1
Physics

Read level tracking and optimization

#49 | 2018-02-01
US20180034484A1
Electricity

Non-binary decoding using tensor product transforms

#50 | 2018-02-01
US20180034479A1
Electricity

Non-binary encoding for non-volatile memory

InventorID:

2108168 ⎘