Sakyasingha Dasgupta

COMMON PIPELINE NON-LINEAR TRANSFORMATION

DEPTH-WISE CONVOLUTION WITH INPUT AND OUTPUT PARALLELISM

ON-CHIP NON-ZERO VALUE UNPACKING AND DISTRIBUTION

LOW-DENSITY PARITY-CHECK (LDPC) DATA DECODING USING ITERATION-VARIABLE ACCURACY

SHIFTER IMPLEMENTED CIRCULANT PERMUTATION MATRIX OPERATIONS

INTEGRATED CIRCUIT DATA STREAM PROCESSING USING PAGED BUFFERING

Sequence partition based schedule optimization

NEURAL NETWORK HARDWARE ACCELERATION VIA SEQUENTIALLY CONNECTED COMPUTATION MODULES

NEURAL NETWORK ACCELERATOR RUN-TIME RECONFIGURABILITY

Neural network hardware accelerator data parallelism

Neural network hardware accelerator data parallelism

Neural network accelerator writable memory

NEURAL NETWORK ACCELERATOR

Hardware and neural architecture co-search

Preparation and execution of quantized scaling on integrated circuitry

Neural network accelerator hardware-specific division of inference into groups of layers

Neural network accelerator run-time reconfigurability

Generating cross-domain data using variational mapping between embedding spaces

REWARD ESTIMATION VIA STATE PREDICTION USING EXPERT DEMONSTRATIONS

Method for adaptive exploration to accelerate deep reinforcement learning

Cooperative neural network deep reinforcement learning with partial input assistance

COOPERATIVE NEURAL NETWORK REINFORCEMENT LEARNING

Neural network cooperation

Neural network cooperation

Neural network reinforcement learning

Neural network reinforcement learning

Regularization of neural networks