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Inventor profile of:

Jaskirat Bindra

City:

San Jose, California

Country:

United States

Published Applications:

6

Last publication date:

2021-01-28

Top Assignees for applications by Jaskirat Bindra

The entities that hold a legal rights for patent applications filed by inventor Bindra Jaskirat:

  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 3 Hsinchu, Taiwan
  • Taiwan Semiconductor Manufacturing Company Limited 3 Hsinchu, Taiwan
  • Taiwan Semiconductor Manufacturing Co., Ltd. 2 , Taiwan

Recent patent applications by Bindra Jaskirat

Jaskirat Bindra from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-01-28
US20210028776A1
Electricity

Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs

#2 | 2020-11-12
US20200357735A1
Electricity

Tapering discrete interconnection for an integrated circuit (IC)

#3 | 2020-01-30
US20200036368A1
Electricity

Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs

#4 | 2019-08-15
US20190252309A1
Electricity

Tapering discrete interconnection for an integrated circuit (IC)

#5 | 2019-03-28
US20190096799A1
Electricity

Tapering discrete interconnection for an integrated circuit (IC)

#6 | 2018-04-19
US20180108388A1
Physics

Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs

InventorID:

2168248 ⎘

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