Inventor profile of:

Thomas A. Langdo

City:

Cambridge, Massachusetts

Country:

United States

Published Applications:

49

Last publication date:

2017-06-22

Top Assignees for applications by Thomas A. Langdo

The entities that hold a legal rights for patent applications filed by inventor Langdo Thomas A.:

Recent patent applications by Langdo Thomas A.

Thomas A. Langdo from Cambridge, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-06-22
US20170179285A1
Electricity

Methods for forming semiconductor device structures

#2 | 2017-04-27
US20170117176A1
Electricity

Methods of forming strained-semiconductor-on-insulator device structures

#3 | 2016-04-21
US20160111285A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#4 | 2015-08-27
US20150243788A1
Electricity

Methods for forming semiconductor device structures

#5 | 2015-07-16
US20150200246A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#6 | 2015-05-07
US20150125528A1
Chemistry; metallurgy

CONTROLLED RELEASE APPARATUS AND USES THEREOF

#7 | 2014-12-25
US20140374798A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#8 | 2014-12-25
US20140374327A1
Chemistry; metallurgy

METHOD AND APPARATUS FOR POINT OF USE WATER FILTRATION

#9 | 2014-08-28
US20140242778A1
Electricity

Methods of forming strained-semiconductor-on-insulator device structures

#10 | 2014-04-17
US20140106546A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#11 | 2014-02-20
US20140051230A1
Electricity

Methods for forming semiconductor device structures

#12 | 2013-12-12
US20130329376A1
Electricity

Electronic modules

#13 | 2013-10-31
US20130285116A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#14 | 2013-05-02
US20130105860A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#15 | 2012-11-29
US20120299662A1
Electricity

Devices, systems, and methods for controlling the temperature of resonant elements

#16 | 2012-04-12
US20120086135A1
Electricity

INTERPOSERS, ELECTRONIC MODULES, AND METHODS FOR FORMING THE SAME

#17 | 2011-12-29
US20110318893A1
Electricity

Methods for forming semiconductor device structures

#18 | 2011-12-22
US20110309528A1
Electricity

Electronic modules and methods for forming the same

#19 | 2011-10-27
US20110260800A1
Electricity

Devices, systems, and methods for controlling the temperature of resonant elements

#20 | 2011-07-21
US20110177681A1
Chemistry; metallurgy

Method of producing high quality relaxed silicon germanium layers

#21 | 2011-07-21
US20110176349A1
Physics

Low-cost high-density rectifier matrix memory

#22 | 2011-03-31
US20110073908A1
Electricity

III-V semiconductor device structures

#23 | 2011-03-03
US20110049568A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#24 | 2010-08-19
US20100206216A1
Chemistry; metallurgy

Method of producing high quality relaxed silicon germanium layers

#25 | 2009-11-10
US10164988
-

Elevated source and drain elements for strained-channel heterojuntion field-effect transistors

#26 | 2009-10-08
US20090250823A1
Electricity

Electronic modules and methods for forming the same

#27 | 2009-10-08
US20090250249A1
Electricity

Interposers, electronic modules, and methods for forming the same

#28 | 2009-09-10
US20090225579A1
Physics

Low cost, high-density rectifier matrix memory

#29 | 2008-06-05
US20080128751A1
Electricity

Methods for forming III-V semiconductor device structures

#30 | 2007-11-22
US20070267722A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#31 | 2006-12-28
US20060292719A1
Electricity

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

#32 | 2006-11-16
US20060258125A1
Electricity

Methods of fabricating semiconductor structures having epitaxially grown source and drain elements

#33 | 2006-09-07
US20060197126A1
Electricity

Methods for forming structures including strained-semiconductor-on-insulator devices

#34 | 2006-09-07
US20060197125A1
Electricity

Methods for forming double gate strained-semiconductor-on-insulator device structures

#35 | 2006-09-07
US20060197124A1
Electricity

Double gate strained-semiconductor-on-insulator device structures

#36 | 2006-09-07
US20060197123A1
Electricity

Methods for forming strained-semiconductor-on-insulator bipolar device structures

#37 | 2006-08-24
US20060186510A1
Electricity

Strained-semiconductor-on-insulator bipolar device structures

#38 | 2006-07-11
US10456708
-

Methods of forming strained-semiconductor-on-insulator finFET device structures

#39 | 2006-05-09
US10392338
-

Method of producing high quality relaxed silicon germanium layers

#40 | 2006-02-07
US10456103
-

Strained-semiconductor-on-insulator device structures

#41 | 2005-12-22
US20050280103A1
Electricity

Strained-semiconductor-on-insulator finFET device structures

#42 | 2005-10-06
US20050218453A1
Electricity

Strained-semiconductor-on-insulator device structures with elevated source/drain regions

#43 | 2005-09-29
US20050212061A1
Electricity

Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes

#44 | 2005-09-22
US20050205934A1
Electricity

Strained germanium-on-insulator device structures

#45 | 2005-09-20
US10458544
-

Methods of fabricating semiconductor structures having epitaxially grown source and drain elements

#46 | 2005-09-15
US20050199954A1
Electricity

Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain

#47 | 2005-09-01
US20050189563A1
Electricity

Strained-semiconductor-on-insulator device structures

#48 | 2005-08-11
US20050176204A1
Electricity

Methods of fabricating semiconductor structures having epitaxially grown source and drain elements

#49 | 2005-07-21
US20050156246A1
Electricity

Methods of forming strained-semiconductor-on-insulator device structures

InventorID:

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