Hsinchu
Taiwan
71
2026-05-07
The entities that hold a legal rights for patent applications filed by inventor Noguchi Hiroki:
Hiroki Noguchi from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:
ONE-TIME-PROGRAMMABLE MEMORY
#2 | 2025-10-16NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM) WITH MULTIPLE MAGNETIC TUNNEL JUNCTION CELLS
#3 | 2025-10-16MEMORY ERROR DETECTION AND CORRECTION
#4 | 2025-10-09MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORY
#5 | 2025-08-21SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
#6 | 2025-06-26NONVOLATILE SRAM
#7 | 2025-04-10MEMORY DEVICE WITH WRITE PULSE TRIMMING
#8 | 2025-03-06BIT LINE DIRECT CHARGE
#9 | 2024-11-21MEMORY INTERFACE
#10 | 2024-11-14Semiconductor MRAM Device and Method
#11 | 2024-10-24ENCODER
#12 | 2024-10-10METHOD AND SYSTEM FOR REPLACEMENT OF MEMORY CELLS
#13 | 2024-09-26MAGNETIC DEVICE AND MAGNETIC RANDOM ACCESS MEMORY
#14 | 2024-09-26SENSING AMPLIFIER, METHOD AND CONTROLLER FOR SENSING MEMORY CELL
#15 | 2024-09-19Semiconductor device and method for forming the same
#16 | 2024-09-19ONE-TIME-PROGRAMMABLE MEMORY
#17 | 2024-09-05NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM) WITH MULTIPLE MAGNETIC TUNNEL JUNCTION CELLS
#18 | 2024-07-18Vertical interconnect structures in three-dimensional integrated circuits
#19 | 2024-07-04DYNAMIC ERROR MONITOR AND REPAIR
#20 | 2024-01-25Memory device with write pulse trimming
#21 | 2024-01-25Memory error detection and correction
#22 | 2024-01-18Method and system for refresh of memory devices
#23 | 2023-11-23Magnetic device and magnetic random access memory
#24 | 2023-11-23SECOND WORD LINE COMBINED WITH Y-MUX SIGNAL IN HIGH VOLTAGE MEMORY PROGRAM
#25 | 2023-10-26Semiconductor device and method for forming the same
#26 | 2023-09-21Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#27 | 2023-08-31Method and system for replacement of memory cells
#28 | 2023-08-31Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals
#29 | 2023-07-13MEMORY INTERFACE
#30 | 2023-06-29Sensing amplifier, method and controller for sensing memory cell
#31 | 2023-06-15Encoder
#32 | 2023-06-08Memory interface
#33 | 2023-05-18Structure for multiple sense amplifiers of memory device
#34 | 2023-05-11Nonvolatile SRAM
#35 | 2022-12-01Magnetic device and magnetic random access memory
#36 | 2022-12-01Second word line combined with Y-MUX signal in high voltage memory program
#37 | 2022-12-01Memory refresh
#38 | 2022-11-17Memory device with write pulse trimming
#39 | 2022-11-10Semiconductor MRAM device and method
#40 | 2022-11-10Structure for multiple sense amplifiers of memory device
#41 | 2022-10-20Dynamic error monitor and repair
#42 | 2022-10-13Vertical interconnect structures in three-dimensional integrated circuits
#43 | 2022-09-22Vertical interconnect structures with integrated circuits
#44 | 2022-08-25Method and system for replacement of memory cells
#45 | 2022-08-25Structure for multiple sense amplifiers of memory device
#46 | 2022-08-11Sensing amplifier, method and controller for sensing memory cell
#47 | 2022-07-21Method and system for refresh of memory devices
#48 | 2022-07-07Memory device with write pulse trimming
#49 | 2022-04-14Memory error detection and correction
#50 | 2022-03-17One-time-programmable memory
#51 | 2021-12-30Semiconductor device and method for forming the same
#52 | 2021-12-09Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#53 | 2021-10-07Test device for memory, method for detecting hardware failure in memory device, and test apparatus of memory array
#54 | 2021-09-02Dynamic error monitor and repair
#55 | 2021-09-02One-time-programmable memory
#56 | 2021-09-02Memory refresh
#57 | 2021-09-02Memory device, sensing amplifier, and method for sensing memory cell
#58 | 2021-09-02Memory device, access controller thereof and method for accessing memory device
#59 | 2021-09-02Memory device for scheduling maximum number of memory macros write operations at re-arranged time intervals
#60 | 2021-08-26Method and system for replacement of memory cells
#61 | 2021-08-26Method and system for refresh of memory devices
#62 | 2021-07-01Magnetic device and magnetic random access memory
#63 | 2021-07-01Nonvolatile SRAM
#64 | 2021-07-01Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#65 | 2021-06-10Symmetry unary code encoder
#66 | 2021-05-06Semiconductor MRAM device and method
#67 | 2021-05-06Structure for multiple sense amplifiers of memory device
#68 | 2020-04-30Memory device
#69 | 2020-04-02Memory error detection and correction
#70 | 2020-01-16SRAM memory
#71 | 2018-06-07Resistance change type memory including write control circuit to control write to variable resistance element
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