Inventor profile of:

Jong-Chern Lee

City:

Gyeonggi-do

Country:

South Korea

Published Applications:

29

Last publication date:

2017-05-25

Top Assignees for applications by Jong-Chern Lee

The entities that hold a legal rights for patent applications filed by inventor Lee Jong-Chern:

Recent patent applications by Lee Jong-Chern

Jong-Chern Lee from Gyeonggi-do, KR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-05-25
US20170146598A1
Physics

Stacked memory device and semiconductor memory system including the same

#2 | 2015-05-07
US20150123133A1
Electricity

INTEGRATED CIRCUIT FOR DETECTING DEFECTS OF THROUGH CHIP VIA

#3 | 2013-09-19
US20130241054A1
Electricity

Stack semiconductor apparatus having a through silicon via and method of fabricating the same

#4 | 2013-09-12
US20130234326A1
Electricity

SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME

#5 | 2013-04-04
US20130083616A1
Physics

Temperature detection circuit of semiconductor memory apparatus

#6 | 2013-01-10
US20130009285A1
Electricity

Semiconductor chip and semiconductor wafer

#7 | 2012-10-04
US20120249229A1
Physics

Semiconductor integrated circuit and semiconductor system including the same

#8 | 2012-06-21
US20120154006A1
Electricity

Duty cycle correction circuit

#9 | 2012-06-21
US20120154002A1
Electricity

Delay locked loop

#10 | 2012-06-21
US20120153280A1
Electricity

Integrated circuit for detecting defects of through chip via

#11 | 2012-03-01
US20120051113A1
Electricity

SEMICONDUCTOR INTEGRATED CIRCUIT

#12 | 2012-03-01
US20120049361A1
Electricity

SEMICONDUCTOR INTEGRATED CIRCUIT

#13 | 2012-01-12
US20120008433A1
Physics

Semiconductor memory device

#14 | 2012-01-12
US20120007624A1
Physics

Semiconductor system and device for identifying stacked chips and method thereof

#15 | 2011-12-01
US20110292740A1
Physics

SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME

#16 | 2011-12-01
US20110291730A1
Electricity

Open loop type delay locked loop and method for operating the same

#17 | 2011-12-01
US20110291266A1
Electricity

Semiconductor integrated circuit having a multi-chip structure

#18 | 2011-11-10
US20110272790A1
Electricity

Semiconductor chip and semiconductor wafer

#19 | 2011-06-30
US20110158024A1
Physics

Semiconductor memory device and method for operating the same

#20 | 2011-06-30
US20110156767A1
Electricity

Delay locked loop and method for driving the same

#21 | 2011-06-30
US20110156766A1
Electricity

Delay locked loop

#22 | 2011-06-02
US20110128794A1
Physics

APPARATUS AND METHOD FOR CONTROLLING OPERATION TIMING IN SEMICONDUCTOR MEMORY DEVICE

#23 | 2011-05-05
US20110103164A1
Physics

Semiconductor memory device and method for performing data compression test of the same

#24 | 2011-01-06
US20110001514A1
Electricity

Command control circuit for semiconductor integrated device

#25 | 2010-12-16
US20100315896A1
Physics

Temperature detection circuit of semiconductor memory apparatus

#26 | 2010-11-18
US20100290263A1
Physics

Circuit and method for controlling read cycle

#27 | 2010-09-30
US20100244920A1
Electricity

Delay circuit

#28 | 2008-06-12
US20080136484A1
Physics

Sense amplifier control signal generating circuit of semiconductor memory apparatus

#29 | 2007-11-15
US20070263465A1
Physics

Precharge circuit of semiconductor memory apparatus

InventorID:

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