Inventor profile of:

Bruce Ratcliff

City:

Red Hook, New York

Country:

United States

Published Applications:

28

Last publication date:

2026-02-05

Top Assignees for applications by Bruce Ratcliff

The entities that hold a legal rights for patent applications filed by inventor Ratcliff Bruce:

Recent patent applications by Ratcliff Bruce

Bruce Ratcliff from Red Hook, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-02-05
US20260039621A1
Electricity

ADDRESS RESOLUTION PROTOCOL PROCESSING USED IN COMMUNICATIONS WITHIN A COMPUTING ENVIRONMENT

#2 | 2026-02-05
US20260039608A1
Electricity

RECEIVE PROCESSING IN COMMUNICATIONS BETWEEN COMPUTING DEVICE(S) AND A NETWORK INTERFACE CARD

#3 | 2026-02-05
US20260037458A1
Physics

INSTRUCTIONS USED IN COMMUNICATIONS BETWEEN COMPUTING DEVICE(S) AND A SHARED ADAPTER

#4 | 2025-07-31
US20250244787A1
Physics

SNOOP LOGIC FUNCTION STREAMING TIMERS

#5 | 2025-05-22
US20250168123A1
Electricity

INTERRUPT HANDLING FOR RECEIVED NETWORK PACKETS

#6 | 2025-05-22
US20250168054A1
Electricity

CONTROL PLANE STRUCTURE FOR COMMUNICATING BETWEEN A HOST AND A SHARED NETWORK ADAPTER

#7 | 2025-05-01
US20250139009A1
Physics

Address based hardware snoop logic with configurable snoopable space settings for hardware assist

#8 | 2025-04-17
US20250123871A1
Physics

TRANSMITTING DATA USING A SHARED NETWORK ADAPTER

#9 | 2025-04-03
US20250112968A1
Electricity

Data constructs for a shared network adapter

#10 | 2024-05-07
US18485922
Electricity

Configuration of data connections between a host and a shared network adapter

#11 | 2020-03-12
US20200081627A1
Physics

Peripheral component interconnect express (PCIE) network with input/output (I/O) operation chaining to reduce communication time within execution of I/O channel operations

#12 | 2020-01-02
US20200004433A1
Physics

Peripheral component interconnect express (PCIE) network with input/output (I/O) chaining to reduce communication time within execution of I/O channel operations

#13 | 2019-09-26
US20190294521A1
Physics

Packet flow tracing in a parallel processor complex

#14 | 2019-09-26
US20190294520A1
Physics

Packet flow tracing in a parallel processor complex

#15 | 2018-05-31
US20180152368A1
Electricity

Packet flow tracing in a parallel processor complex

#16 | 2018-05-31
US20180150374A1
Physics

Packet flow tracing in a parallel processor complex

#17 | 2017-05-18
US20170141985A1
Electricity

Selectively refreshing address registration information

#18 | 2017-05-04
US20170126620A1
Electricity

Selectively refreshing address registration information

#19 | 2016-09-01
US20160255046A1
Electricity

Selectively refreshing address registration information

#20 | 2016-09-01
US20160254978A1
Electricity

Selectively refreshing address registration information

#21 | 2015-03-19
US20150078176A1
Electricity

Selectively refreshing address registration information

#22 | 2014-12-25
US20140376556A1
Electricity

Selectively refreshing address registration information

#23 | 2013-05-02
US20130111037A1
Electricity

Management of a data network of a computing environment

#24 | 2012-08-16
US20120207031A1
Electricity

Hypervisor routing between networks in a virtual networking environment

#25 | 2012-07-19
US20120182992A1
Electricity

Hypervisor routing between networks in a virtual networking environment

#26 | 2012-05-03
US20120110155A1
Electricity

Management of a data network of a computing environment

#27 | 2008-10-23
US20080263408A1
Electricity

Apparatus and method to integrate hardware adapter tracing with a host OS tracing through signaling

#28 | 2008-10-23
US20080262638A1
Electricity

Apparatus and method to integrate hardware adapter diagnostics with a host OS diagnostics through signaling

InventorID:

227025 ⎘