Mountain View, California
United States
34
2017-07-13
The entities that hold a legal rights for patent applications filed by inventor Klaiber Alexander:
Alexander Klaiber from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Lazy runahead operation for a microprocessor
#2 | 2017-02-09PROCESSING BYPASS DIRECTORY TRACKING SYSTEM AND METHOD
#3 | 2016-12-22Efficient recording and replaying of non-deterministic instructions in a virtual machine and CPU therefor
#4 | 2015-05-28SUPPORTING SPECULATIVE MODIFICATION IN A DATA CACHE
#5 | 2014-12-30Method and system for caching attribute data for matching attributes with physical addresses
#6 | 2014-09-18Profiling code portions to generate translations
#7 | 2014-09-18Translation lookaside buffer entry systems and methods
#8 | 2014-07-03Queued instruction re-dispatch after runahead
#9 | 2014-06-12INSTRUCTION CATEGORIZATION FOR RUNAHEAD OPERATION
#10 | 2014-06-12Lazy runahead operation for a microprocessor
#11 | 2014-05-15Managing potentially invalid results during runahead
#12 | 2014-03-20Speculative permission acquisition for shared memory
#13 | 2013-10-31Efficient recording and replaying of non-deterministic instructions in a virtual machine and CPU therefor
#14 | 2013-05-02Method and system for caching attribute data for matching attributes with physical addresses
#15 | 2012-10-18Processing bypass directory tracking system and method
#16 | 2012-10-04SYSTEM AND METHOD FOR IDENTIFYING TLB ENTRIES ASSOCIATED WITH A PHYSICAL ADDRESS OF A SPECIFIED RANGE
#17 | 2012-06-28Method and system for caching attribute data for matching attributes with physical addresses
#18 | 2012-03-29Setting a flag bit to defer event handling to one of multiple safe points in an instruction stream
#19 | 2012-03-22System and method for identifying TLB entries associated with a physical address of a specified range
#20 | 2011-09-13Setting a flag bit to defer event handling to a safe point in an instruction stream
#21 | 2011-07-21Processing bypass directory tracking system and method
#22 | 2011-07-12Method and system for caching attribute data for matching attributes with physical addresses
#23 | 2011-05-03Processing bypass directory tracking system and method
#24 | 2010-08-10Processing bypass register file system and method
#25 | 2010-05-25Braided set associative caching techniques
#26 | 2010-01-07Efficient recording and replaying of non-deterministic instructions in a virtual machine and CPU therefor
#27 | 2009-10-20Method and system for conservatively managing store capacity available to a processor issuing stores
#28 | 2009-10-20Method and system for using one or more address bits and an instruction to increase an instruction set
#29 | 2009-01-13Processing bypass directory tracking system and method
#30 | 2008-11-27System and method for identifying TLB entries associated with a physical address of a specified range
#31 | 2008-05-27System and method for identifying TLB entries associated with a physical address of a specified range
#32 | 2007-12-18Methods and systems employing a flag for deferring exception handling to a commit or rollback point
#33 | 2006-12-12Method and system for conservatively managing store capacity available to a processor issuing stores
#34 | 2005-01-13System and method for identifying TLB entries associated with a physical address of a specified range
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