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Inventor profile of:

Juing-Yi Wu

City:

Hsinchu

Country:

Taiwan

Published Applications:

Last publication date:

2022-03-03

Top Assignees for applications by Juing-Yi Wu

The entities that hold a legal rights for patent applications filed by inventor Wu Juing-Yi:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 5 Hsin-Chu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 5 Hsin-Chu, Taiwan
Taiwan Semiconductor Manufacturing Company Limited 2 Hsin-Chu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 2 Hsinchu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 1 , Taiwan
Taiwan Semiconductor Manuafacturing Company, Ltd. 1 Hsin-Chu, Taiwan
Taiwan Semiconductor Manufacturing Company 1 Hsin-Chu, Taiwan
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 1 Hsinchu, Taiwan
Taiwan Semicondutor Manufacturing Co., Ltd. 1 Hsin-Chu, Taiwan

Recent patent applications by Wu Juing-Yi

Juing-Yi Wu from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2022-03-03

US20220068812A1

Electricity

Different scaling ratio in FEOL / MOL/ BEOL

#2 | 2020-08-13

US20200257842A1

Physics

Cell layout and structure

#3 | 2019-09-19

US20190287905A1

Electricity

Different scaling ratio in FEOL / MOL/ BEOL

#4 | 2019-08-08

US20190244950A1

Electricity

Conductive line patterning

#5 | 2018-09-06

US20180253522A1

Physics

Cell layout and structure

#6 | 2017-09-28

US20170278717A1

Electricity

Semiconductor device and manufacturing method thereof

#7 | 2016-10-06

US20160293590A1

Electricity

Mask optimization for multi-layer contacts

#8 | 2016-06-02

US20160155704A1

Electricity

Different scaling ratio in FEOL/ MOL/ BEOL

#9 | 2016-05-12

US20160133693A1

Electricity

Semiconductor device having a metal gate

#10 | 2015-11-12

US20150322565A1

Chemistry; metallurgy

Implant region definition

#11 | 2015-05-21

US20150143319A1

Physics

Different scaling ratio in FEOL / MOL/ BEOL

#12 | 2015-03-12

US20150072480A1

Electricity

Implant region definition

#13 | 2015-02-19

US20150050810A1

Electricity

Method for preventing photoresist corner rounding effects

#14 | 2015-02-19

US20150048457A1

Electricity

Mask optimization for multi-layer contacts

#15 | 2015-01-01

US20150001734A1

Electricity

Conductive line patterning

#16 | 2014-09-18

US20140282294A1

Physics

Method, system and software for accessing design rules and library of design features while designing semiconductor device layout

#17 | 2013-05-02

US20130111418A1

Physics

Method, system and software for accessing design rules and library of design features while designing semiconductor device layout

#18 | 2007-10-18

US20070241406A1

Electricity

Electrostatic discharge protector for an integrated circuit

InventorID:

2288282 ⎘