Inventor profile of:

Mohit Karve

City:

Austin, Texas

Country:

United States

Published Applications:

28

Last publication date:

2024-06-20

Top Assignees for applications by Mohit Karve

The entities that hold a legal rights for patent applications filed by inventor Karve Mohit:

Recent patent applications by Karve Mohit

Mohit Karve from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-06-20
US20240202127A1
Physics

SIDEBAND INSTRUCTION ADDRESS TRANSLATION

#2 | 2023-07-13
US20230222066A1
Physics

Prefetch unit filter for microprocessor

#3 | 2023-07-06
US20230214221A1
Physics

Miss-driven instruction prefetching

#4 | 2023-06-29
US20230205543A1
Physics

Multi-table instruction prefetch unit for microprocessor

#5 | 2023-06-01
US20230169001A1
Physics

Augmenting cache replacement operations

#6 | 2023-02-23
US20230056423A1
Physics

Processor core simulator including trace-based coherent cache driven memory traffic generator

#7 | 2022-12-29
US20220414018A1
Physics

Translating virtual addresses in a virtual memory based system

#8 | 2022-12-01
US20220382552A1
Physics

Link stack based instruction prefetch augmentation

#9 | 2022-09-29
US20220309001A1
Physics

Translation bandwidth optimized prefetching strategy through multiple translation lookaside buffers

#10 | 2022-04-28
US20220129385A1
Physics

Fast cache tracking to support aggressive prefetching

#11 | 2022-01-20
US20220019440A1
Physics

Linked miss-to-miss instruction prefetcher

#12 | 2022-01-13
US20220012183A1
Physics

Methods and systems for translating virtual addresses in a virtual memory based system

#13 | 2021-11-11
US20210349722A1
Physics

Store prefetches for dependent loads in a processor

#14 | 2021-11-04
US20210342268A1
Physics

Prefetch store preallocation in an effective address-based cache directory

#15 | 2021-10-21
US20210326138A1
Physics

Fractional or partial line usage prediction in a processor

#16 | 2021-06-03
US20210165745A1
Physics

Methods and systems for translating virtual addresses in a virtual memory based system

#17 | 2021-06-03
US20210165743A1
Physics

Methods and systems for translating virtual addresses in a virtual memory based system

#18 | 2021-05-13
US20210141642A1
Physics

Instruction address based data prediction and prefetching

#19 | 2021-02-04
US20210034529A1
Physics

Dynamically adjusting prefetch depth

#20 | 2021-02-04
US20210034528A1
Physics

Dynamically adjusting prefetch depth

#21 | 2021-01-14
US20210011721A1
Physics

Prefetching workloads with dependent pointers

#22 | 2020-12-31
US20200409864A1
Physics

Speculative address translation requests pertaining to instruction cache misses

#23 | 2020-12-10
US20200387381A1
Physics

Prefetch filter table for storing moderately-confident entries evicted from a history table

#24 | 2020-05-07
US20200142698A1
Physics

Processor prefetcher mode governor for switching between prefetch modes

#25 | 2020-04-30
US20200133671A1
Physics

Prefetch stream allocation for multithreading systems

#26 | 2020-03-12
US20200081714A1
Physics

Prefetch queue allocation protection bubble in a processor

#27 | 2018-11-29
US20180341592A1
Physics

Prefetch performance

#28 | 2018-11-29
US20180341591A1
Physics

Prefetch performance

InventorID:

2359953 ⎘