Inventor profile of:

John Steven Dodson

City:

Pflugerville, Texas

Country:

United States

Published Applications:

17

Last publication date:

2014-02-20

Top Assignees for applications by John Steven Dodson

The entities that hold a legal rights for patent applications filed by inventor Dodson John Steven:

Recent patent applications by Dodson John Steven

John Steven Dodson from Pflugerville, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-02-20
US20140052936A1
Physics

MEMORY QUEUE HANDLING TECHNIQUES FOR REDUCING IMPACT OF HIGH-LATENCY MEMORY OPERATIONS

#2 | 2013-05-30
US20130138878A1
Physics

Apparatus for scheduling memory refresh operations including power states

#3 | 2013-05-09
US20130117513A1
Physics

Memory queue handling techniques for reducing impact of high-latency memory operations

#4 | 2007-11-27
US10406649
-

Method and apparatus for performing bus tracing with scalable bandwidth in a data processing system having a distributed memory

#5 | 2007-05-01
US10406650
-

Method and apparatus for performing imprecise bus tracing in a data processing system having a distributed memory

#6 | 2006-06-06
US10425400
-

Adaptive memory access speculation

#7 | 2006-03-21
US10319023
-

Data processing system having no system memory

#8 | 2005-11-29
US9340074
-

Layered local cache with lower level cache optimizing allocation mechanism

#9 | 2005-11-08
US9588508
-

System and method for enabling weak consistent storage advantage to a firmly consistent storage architecture

#10 | 2005-07-19
US10268741
-

Method and system of managing virtualized physical memory in a data processing system

#11 | 2005-06-14
US10268728
-

Method and system of managing virtualized physical memory in a memory controller and processor system

#12 | 2005-06-07
US10268743
-

Method and system of managing virtualized physical memory in a multi-processor system

#13 | 2005-05-31
US9886000
-

Memory directory management in a multi-node computer system

#14 | 2005-04-26
US9885998
-

Dynamic history based mechanism for the granting of exclusive data ownership in a non-uniform memory access (NUMA) computer system

#15 | 2005-04-12
US9753053
-

Speculative execution of instructions and processes before completion of preceding barrier operations

#16 | 2005-03-31
US20050071573A1
Physics

Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes

#17 | 2005-03-10
US20050055528A1
Physics

Data processing system having a physically addressed cache of disk memory

InventorID:

238875 ⎘