Inventor profile of:

Michael Murphy

City:

Newark, California

Country:

United States

Published Applications:

21

Last publication date:

2026-06-04

Top Assignees for applications by Michael Murphy

The entities that hold a legal rights for patent applications filed by inventor Murphy Michael:

Recent patent applications by Murphy Michael

Michael Murphy from Newark, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-06-04
US20260154050A1
Physics

CODE GENERATION TECHNIQUE

#2 | 2026-03-12
US20260072661A1
Physics

CODE GENERATION BASED ON PROCESSOR USAGE

#3 | 2026-02-26
US20260056747A1
Physics

LOCATION AGNOSTIC DATA ACCESS

#4 | 2026-02-19
US20260050453A1
Physics

METHOD AND SYSTEM FOR MULTIPLE EMBEDDED DEVICE LINKS IN A HOST EXECUTABLE

#5 | 2025-11-20
US20250355674A1
Physics

MEMORY INITIALIZATION

#6 | 2025-11-20
US20250355647A1
Physics

COMPILER TO CAUSE INFORMATION INITIALIZATION

#7 | 2025-09-23
US17499438
Physics

Code generation based on processor usage

#8 | 2024-08-08
US20240264853A1
Physics

JUST IN TIME COMPILATION USING LINK TIME OPTIMIZATION

#9 | 2024-03-21
US20240095044A1
Physics

APPLICATION PROGRAMMING INTERFACE TO MODIFY CODE

#10 | 2023-11-23
US20230376287A1
Physics

CODE GENERATION TECHNIQUE

#11 | 2023-09-07
US20230281030A1
Physics

Just in time compilation using link time optimization

#12 | 2023-07-13
US20230221960A1
Physics

LOCATION AGNOSTIC DATA ACCESS

#13 | 2019-06-06
US20190171466A1
Physics

METHOD AND SYSTEM FOR MULTIPLE EMBEDDED DEVICE LINKS IN A HOST EXECUTABLE

#14 | 2013-11-14
US20130305234A1
Physics

Method and system for multiple embedded device links in a host executable

#15 | 2013-11-14
US20130305233A1
Physics

Method and system for separate compilation of device code embedded in host code

#16 | 2013-05-09
US20130117548A1
Physics

Algorithm for vectorization and memory coalescing during compiling

#17 | 2009-10-15
US20090259997A1
Physics

Variance analysis for translating CUDA code for execution by a general purpose processor

#18 | 2009-10-15
US20090259996A1
Physics

Partitioning CUDA code for execution by a general purpose processor

#19 | 2009-10-15
US20090259832A1
Physics

Retargetting an application program for execution by a general purpose processor

#20 | 2009-10-15
US20090259829A1
Physics

Thread-local memory reference promotion for translating CUDA code for execution by a general purpose processor

#21 | 2009-10-15
US20090259828A1
Physics

Execution of retargetted graphics processor accelerated code by a general purpose processor

InventorID:

238926 ⎘