Boise, Idaho
United States
21
2026-06-04
The entities that hold a legal rights for patent applications filed by inventor Johnson James B.:
James B. Johnson from Boise, US has applied for patents for these inventions. The list has both pending applications and granted patents:
SIGNAL ROUTING STRUCTURES INCLUDING A PLURALITY OF PARALLEL CONDUCTIVE LINES AND SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING THE SAME
#2 | 2025-02-27PROCESSING IN MEMORY REGISTERS
#3 | 2023-08-24SIGNAL ROUTING STRUCTURES INCLUDING A PLURALITY OF PARALLEL CONDUCTIVE LINES AND SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING THE SAME
#4 | 2014-11-13Memory system and method using stacked memory device dice, and system using the memory system
#5 | 2014-09-11Memory systems and methods for controlling the timing of receiving read data
#6 | 2014-02-06Self-timed error correcting code evaluation system and method
#7 | 2013-12-26Memory system and method using stacked memory device dice, and system using the memory system
#8 | 2013-11-28Memory systems and methods for controlling the timing of receiving read data
#9 | 2013-05-09Self-timed error correcting code evaluation system and method
#10 | 2011-12-01Memory system and method using stacked memory device dice, and system using the memory system
#11 | 2011-03-31Memory system and method using stacked memory device dice, and system using the memory system
#12 | 2011-02-24System and method for capturing data signals using a data strobe signal
#13 | 2010-01-21Memory system and method using stacked memory device dice, and system using the memory system
#14 | 2009-12-03Memory systems and methods for controlling the timing of receiving read data
#15 | 2009-12-03System and method for capturing data signals using a data strobe signal
#16 | 2008-01-31System and method for capturing data signals using a data strobe signal
#17 | 2006-11-09Memory device and method having a data bypass path to allow rapid testing and calibration
#18 | 2006-11-09System and method for capturing data signals using a data strobe signal
#19 | 2006-08-31Duty cycle distortion compensation for the data output of a memory device
#20 | 2005-05-17Method and apparatus for compensating duty cycle distortion in a data output signal from a memory device by delaying and distorting a reference clock
#21 | 2005-05-12Duty cycle distortion compensation for the data output of a memory device
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