Inventor profile of:

Wei Min Chan

City:

Hsinchu

Country:

Taiwan

Published Applications:

21

Last publication date:

2026-03-19

Top Assignees for applications by Wei Min Chan

The entities that hold a legal rights for patent applications filed by inventor Chan Wei Min:

Recent patent applications by Chan Wei Min

Wei Min Chan from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-03-19
US20260080920A1
Physics

MEMORY DEVICE, METHOD, LAYOUT, AND SYSTEM

#2 | 2026-03-19
US20260080908A1
Physics

MEMORY CIRCUIT AND METHOD OF FORMING THE SAME

#3 | 2025-11-20
US20250359001A1
Electricity

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#4 | 2025-11-20
US20250358999A1
Electricity

INTEGRATED CIRCUIT DEVICE AND METHOD

#5 | 2025-11-20
US20250355587A1
Physics

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#6 | 2025-11-20
US20250355586A1
Physics

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

#7 | 2025-11-13
US20250349353A1
Physics

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

#8 | 2025-11-06
US20250342864A1
Physics

INTEGRATED CIRCUIT DEVICE, MEMORY CELL AND METHOD

#9 | 2025-09-18
US20250292810A1
Physics

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#10 | 2025-02-06
US20250046367A1
Physics

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

#11 | 2024-12-12
US20240413100A1
Electricity

STACKED TRANSISTOR PHYSICALLY UNCLONABLE FUNCTION

#12 | 2024-10-03
US20240331764A1
Physics

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#13 | 2024-09-19
US20240312492A1
Physics

INTEGRATED CIRCUIT DEVICE, MEMORY CELL AND METHOD

#14 | 2024-09-12
US20240302980A1
Physics

INTEGRATED CIRCUIT AND METHOD OF FORMING THE SAME

#15 | 2024-08-22
US20240284654A1
Electricity

SRAM HAVING CFET STACKS AND METHOD OF MANUFACTURING SAME

#16 | 2024-08-15
US20240276696A1
Electricity

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#17 | 2024-08-01
US20240257840A1
Physics

INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME

#18 | 2024-07-25
US20240251541A1
Electricity

MEMORY DEVICE, METHOD, LAYOUT, AND SYSTEM

#19 | 2024-07-25
US20240251540A1
Electricity

INTEGRATED CIRCUIT DEVICE AND METHOD

#20 | 2021-09-16
US20210287740A1
Physics

Static random access memory

#21 | 2019-02-21
US20190058603A1
Electricity

Physically unclonable function (PUF) generation

InventorID:

2436740 ⎘