Boise, Idaho
United States
26
2016-09-22
The entities that hold a legal rights for patent applications filed by inventor Violette Mike:
Mike Violette from Boise, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
#2 | 2014-08-21Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
#3 | 2013-09-26Memory elements using self-aligned phase change material layers and methods of manufacturing same
#4 | 2013-05-16Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
#5 | 2012-11-08Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using same
#6 | 2012-09-06Resistive memory cell fabrication methods and devices
#7 | 2012-03-08Resistive memory architectures with multiple memory cells per access device
#8 | 2011-06-23Method and apparatus providing high density chalcogenide-based data storage
#9 | 2011-03-17Phase change memory structure with multiple resistance states and methods of programming and sensing same
#10 | 2010-12-23Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using same
#11 | 2010-09-16Resistive memory cell fabrication methods and devices
#12 | 2010-06-17Resistive memory architectures with multiple memory cells per access device
#13 | 2009-09-10Resistive memory device
#14 | 2008-12-04Phase change memory structure with multiple resistance states and methods of programming and sensing same
#15 | 2008-12-04Resistive memory architectures with multiple memory cells per access device
#16 | 2008-10-23Resistive memory cell fabrication methods and devices
#17 | 2008-06-05Resistive memory device
#18 | 2008-02-21Phase change memory elements using energy conversion layers, memory arrays and systems including same, and methods of making and using
#19 | 2008-02-14Resistive memory device
#20 | 2007-10-18Method and apparatus providing high density data storage
#21 | 2006-10-19LOCOS trench isolation structures
#22 | 2005-12-01Suppression of cross diffusion and gate depletion
#23 | 2005-11-08Suppression of cross diffusion and gate depletion
#24 | 2005-08-16Method of selectively forming local interconnects using design rules
#25 | 2005-05-31Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same
#26 | 2005-01-20Locos trench isolation structure
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