Allen, Texas
United States
24
2026-01-01
The entities that hold a legal rights for patent applications filed by inventor Varadarajan Devanathan:
Devanathan Varadarajan from Allen, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Packet-Based One-Time Programmable Memory
#2 | 2025-12-04CLOCK SIGNAL CONTROL FOR SCAN-CHAIN TESTING
#3 | 2025-07-10NON-VOLATILE MEMORY COMPRESSION FOR MEMORY REPAIR
#4 | 2025-07-03MEMORY BIST CIRCUIT AND METHOD
#5 | 2025-04-17DISTRIBUTED MECHANISM FOR FINE-GRAINED TEST POWER CONTROL
#6 | 2025-01-23METHODS AND APPARATUS TO CHARACTERIZE MEMORY
#7 | 2024-10-17METHODS AND APPARATUS TO IDENTIFY FAULTS IN PROCESSORS
#8 | 2024-09-26BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION
#9 | 2024-05-23Memory BIST circuit and method
#10 | 2024-04-11At-speed test of functional memory interface logic in devices
#11 | 2023-12-21Non-volatile memory compression for memory repair
#12 | 2023-10-12Methods and apparatus to identify faults in processors
#13 | 2023-08-10Built-in memory repair with repair code compression
#14 | 2023-07-20Methods and apparatus to characterize memory
#15 | 2023-06-15Distributed mechanism for fine-grained test power control
#16 | 2023-05-11Screening of memory circuits
#17 | 2022-12-29Non-volatile memory compression for memory repair
#18 | 2022-10-06Management of multiple memory in-field self-repair options
#19 | 2022-06-23Built-in memory repair with repair code compression
#20 | 2022-06-23Non-volatile memory compression for memory repair
#21 | 2021-10-21AT-SPEED TEST OF FUNCTIONAL MEMORY INTERFACE LOGIC IN DEVICES
#22 | 2020-10-08Management of multiple memory in-field self-repair options
#23 | 2020-09-17Screening of memory circuits
#24 | 2019-05-23Enabling high at-speed test coverage of functional memory interface logic by selective usage of test paths
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