Inventor profile of:

Yu Shih WANG

City:

Tainan

Country:

Taiwan

Published Applications:

32

Last publication date:

2024-11-14

Top Assignees for applications by Yu Shih WANG

The entities that hold a legal rights for patent applications filed by inventor WANG Yu Shih:

Recent patent applications by WANG Yu Shih

Yu Shih WANG from Tainan, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-11-14
US20240379433A1
Electricity

CONDUCTIVE FEATURE FORMATION AND STRUCTURE USING BOTTOM-UP FILLING DEPOSITION

#2 | 2024-04-25
US20240136183A1
Electricity

METHOD OF BREAKING THROUGH ETCH STOP LAYER

#3 | 2024-03-21
US20240096630A1
Electricity

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

#4 | 2023-12-28
US20230420538A1
Electricity

DEVICE WITH MODIFIED WORK FUNCTION LAYER AND METHOD OF FORMING THE SAME

#5 | 2023-11-16
US20230369109A1
Electricity

Conductive feature formation and structure

#6 | 2023-06-22
US20230197617A1
Electricity

SEMICONDUCTOR STRUCTURE

#7 | 2023-05-25
US20230163027A1
Electricity

Wet Cleaning with Tunable Metal Recess for Via Plugs

#8 | 2023-02-09
US20230041753A1
Electricity

Semiconductor device and method of manufacture

#9 | 2022-12-08
US20220392803A1
Electricity

Conductive feature of a semiconductor device

#10 | 2022-11-17
US20220367258A1
Electricity

Semiconductor device and method

#11 | 2022-11-17
US20220367254A1
Electricity

Semiconductor device and method of manufacture

#12 | 2022-11-10
US20220359235A1
Electricity

Method for processing substrate

#13 | 2022-09-08
US20220285209A1
Electricity

Conductive feature of a semiconductor device and method of forming same

#14 | 2022-06-02
US20220172945A1
Electricity

Method of breaking through etch stop layer

#15 | 2022-02-17
US20220051982A1
Electricity

Connecting structure and method for forming the same

#16 | 2021-12-02
US20210375677A1
Electricity

Semiconductor device and method of forming same

#17 | 2021-11-25
US20210366737A1
Electricity

Substrate processing apparatus and method for processing substrate

#18 | 2021-10-21
US20210327760A1
Electricity

Method for forming semiconductor device that includes covering metal gate with multilayer dielectric

#19 | 2021-07-22
US20210225701A1
Electricity

Conductive feature formation and structure

#20 | 2021-07-01
US20210202399A1
Electricity

Semiconductor device and manufacturing method thereof

#21 | 2021-07-01
US20210202305A1
Electricity

Semiconductor device and method

#22 | 2021-07-01
US20210202238A1
Electricity

Method of breaking through etch stop layer

#23 | 2021-06-24
US20210193517A1
Electricity

Conductive Feature Formation and Structure Using Bottom-Up Filling Deposition

#24 | 2021-05-06
US20210134662A1
Electricity

Wet cleaning with tunable metal recess for via plugs

#25 | 2021-05-06
US20210134660A1
Electricity

Semiconductor device and method of manufacture using a contact etch stop layer (CESL) breakthrough process

#26 | 2020-12-24
US20200402859A1
Electricity

Contact structure and method of fabricating the same

#27 | 2019-10-03
US20190304834A1
Electricity

Wet cleaning with tunable metal recess for VIA plugs

#28 | 2019-09-19
US20190287851A1
Electricity

Conductive feature formation and structure using bottom-up filling deposition

#29 | 2019-05-30
US20190164824A1
Electricity

Conductive feature formation and structure

#30 | 2019-05-30
US20190164823A1
Electricity

Conductive feature formation and structure

#31 | 2018-10-25
US20180308761A1
Electricity

Contact structure and method of fabricating the same

#32 | 2018-05-31
US20180151560A1
Electricity

Contact structure and method of fabricating the same

InventorID:

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