Inventor profile of:

James Roberts

City:

Austin, Texas

Country:

United States

Published Applications:

23

Last publication date:

2014-10-28

Top Assignees for applications by James Roberts

The entities that hold a legal rights for patent applications filed by inventor Roberts James:

Recent patent applications by Roberts James

James Roberts from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-10-28
US12326760
Physics

Padding buffer requests to avoid reads of invalid data

#2 | 2014-10-21
US12276154
-

Multi-class data cache policies

#3 | 2014-10-14
US12340503
-

Compression status caching

#4 | 2014-08-21
US20140237189A1
Physics

Compression status bit cache and backing store

#5 | 2013-11-26
US12276147
-

Compression status bit cache with deterministic isochronous latency

#6 | 2013-08-06
US12326764
-

Storing dynamically sized buffers within a cache

#7 | 2013-06-11
US12331305
-

Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanism

#8 | 2013-05-16
US20130124802A1
Physics

Techniques for evicting dirty data from a cache using a notification sorter and count thresholds

#9 | 2012-12-25
US12562989
-

System and method for cleaning dirty data in a cache via frame buffer logic

#10 | 2012-09-18
US12329345
-

Method and system for converting data formats using a shared cache coupled between clients and an external memory

#11 | 2012-08-14
US12330467
-

System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy

#12 | 2012-07-31
US12256400
-

Using a data cache array as a DRAM load/store buffer

#13 | 2012-07-05
US20120170586A1
Electricity

Transmitting Data to Multiple Nodes

#14 | 2012-04-10
US12202161
-

L2 ECC implementation

#15 | 2012-03-13
US12255599
-

Cache-based control of atomic operations in conjunction with an external ALU block

#16 | 2012-03-06
US12256378
-

Configurable cache occupancy policy

#17 | 2012-01-31
US12255595
-

Cache-based control of atomic operations in conjunction with an external ALU block

#18 | 2012-01-17
US12202160
-

L2 ECC implementation

#19 | 2011-11-15
US12330469
-

System, method and frame buffer logic for evicting dirty data from a cache using counters and data types

#20 | 2011-11-10
US20110275401A1
Electricity

Wireless portable radio vehicle communication system

#21 | 2011-07-21
US20110177778A1
Electricity

Radio and Public Address Accessory System with Wireless Interface

#22 | 2011-04-14
US20110087840A1
Physics

Efficient line and page organization for compression status bit caching

#23 | 2010-06-03
US20100138614A1
Physics

Compression status bit cache and backing store

InventorID:

252388 ⎘