Austin, Texas
United States
23
2014-10-28
The entities that hold a legal rights for patent applications filed by inventor Roberts James:
James Roberts from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Padding buffer requests to avoid reads of invalid data
#2 | 2014-10-21Multi-class data cache policies
#3 | 2014-10-14Compression status caching
#4 | 2014-08-21Compression status bit cache and backing store
#5 | 2013-11-26Compression status bit cache with deterministic isochronous latency
#6 | 2013-08-06Storing dynamically sized buffers within a cache
#7 | 2013-06-11Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanism
#8 | 2013-05-16Techniques for evicting dirty data from a cache using a notification sorter and count thresholds
#9 | 2012-12-25System and method for cleaning dirty data in a cache via frame buffer logic
#10 | 2012-09-18Method and system for converting data formats using a shared cache coupled between clients and an external memory
#11 | 2012-08-14System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy
#12 | 2012-07-31Using a data cache array as a DRAM load/store buffer
#13 | 2012-07-05Transmitting Data to Multiple Nodes
#14 | 2012-04-10L2 ECC implementation
#15 | 2012-03-13Cache-based control of atomic operations in conjunction with an external ALU block
#16 | 2012-03-06Configurable cache occupancy policy
#17 | 2012-01-31Cache-based control of atomic operations in conjunction with an external ALU block
#18 | 2012-01-17L2 ECC implementation
#19 | 2011-11-15System, method and frame buffer logic for evicting dirty data from a cache using counters and data types
#20 | 2011-11-10Wireless portable radio vehicle communication system
#21 | 2011-07-21Radio and Public Address Accessory System with Wireless Interface
#22 | 2011-04-14Efficient line and page organization for compression status bit caching
#23 | 2010-06-03Compression status bit cache and backing store
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