Inventor profile of:

Dana Michelle Vantrease

City:

Austin, Texas

Country:

United States

Published Applications:

18

Last publication date:

2026-04-21

Top Assignees for applications by Dana Michelle Vantrease

The entities that hold a legal rights for patent applications filed by inventor Vantrease Dana Michelle:

Recent patent applications by Vantrease Dana Michelle

Dana Michelle Vantrease from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-21
US17587714
Physics

Weight loading in an array with a configurable weight register to selectively store a flush value

#2 | 2025-07-01
US17301251
Physics

Testing integrated circuit designs with accelerated replay

#3 | 2024-04-16
US17229742
Physics

Reducing computations for data including padding

#4 | 2023-11-02
US20230351186A1
Physics

Processing for multiple input data sets in a multi-layer neural network

#5 | 2023-10-12
US20230325348A1
Physics

PERFORMING CONCURRENT OPERATIONS IN A PROCESSING ELEMENT

#6 | 2023-01-19
US20230014783A1
Physics

Processing for multiple input data sets

#7 | 2022-03-15
US16582346
Physics

Test generation of a distributed system

#8 | 2022-03-15
US15967318
Physics

Weight loading in an array

#9 | 2021-11-16
US16219610
Physics

Synchronization of concurrent computation engines

#10 | 2020-09-17
US20200293284A1
Physics

Accelerated quantized multiply-and-add operations

#11 | 2020-07-07
US15918930
Physics

Integrated circuit with rate limiting

#12 | 2020-05-26
US16266731
Physics

Runtime augmentation of engine instructions

#13 | 2020-02-13
US20200050582A1
Physics

Performing concurrent operations in a processing element

#14 | 2019-09-26
US20190294968A1
Physics

Processing for multiple input data sets

#15 | 2019-09-26
US20190294959A1
Physics

Scheduling neural network computations based on memory capacity

#16 | 2019-09-26
US20190294413A1
Physics

Accelerated quantized multiply-and-add operations

#17 | 2019-09-03
US15716376
Physics

Reducing traffic in hierarchical cache interconnects

#18 | 2019-08-01
US20190236049A1
Physics

Performing concurrent operations in a processing element

InventorID:

2575364 ⎘