Inventor profile of:

Joab D. Henderson

City:

Pflugerville, Texas

Country:

United States

Published Applications:

26

Last publication date:

2018-03-08

Top Assignees for applications by Joab D. Henderson

The entities that hold a legal rights for patent applications filed by inventor Henderson Joab D.:

Recent patent applications by Henderson Joab D.

Joab D. Henderson from Pflugerville, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2018-03-08
US20180067874A1
Physics

System for securing contents of removable memory

#2 | 2016-01-28
US20160027494A1
Physics

Prioritizing refreshes in a memory device

#3 | 2015-10-01
US20150278086A1
Physics

Implementing enhanced reliability of systems utilizing dual port DRAM

#4 | 2015-10-01
US20150278005A1
Physics

Implementing enhanced reliability of systems utilizing dual port DRAM

#5 | 2015-09-24
US20150270018A1
Physics

Traffic and temperature based memory testing

#6 | 2015-09-24
US20150270017A1
Physics

Traffic and temperature based memory testing

#7 | 2015-08-13
US20150228328A1
Physics

Reference voltage modification in a memory device

#8 | 2015-07-30
US20150213854A1
Physics

Implementing simultaneous read and write operations utilizing dual port DRAM

#9 | 2015-07-30
US20150213853A1
Physics

Implementing simultaneous read and write operations utilizing dual port DRAM

#10 | 2015-06-25
US20150178147A1
Physics

Self monitoring and self repairing ECC

#11 | 2015-05-21
US20150143200A1
Physics

Computer memory power management

#12 | 2015-05-21
US20150143199A1
Physics

Computer memory power management

#13 | 2015-05-07
US20150127899A1
Physics

Memory device for interruptible memory refresh

#14 | 2015-05-07
US20150127898A1
Physics

System and memory controller for interruptible memory refresh

#15 | 2014-11-13
US20140334225A1
Physics

Prioritizing refreshes in a memory device

#16 | 2014-11-13
US20140334224A1
Physics

Reference voltage modification in a memory device

#17 | 2014-10-23
US20140317473A1
Physics

Implementing ECC redundancy using reconfigurable logic blocks

#18 | 2014-10-09
US20140304566A1
Physics

Method and apparatus for mitigating effects of memory scrub operations on idle time power savings mode

#19 | 2014-10-09
US20140304537A1
Physics

Method and apparatus for mitigating effects of memory scrub operations on idle time power savings modes

#20 | 2014-09-25
US20140289488A1
Physics

System for securing contents of removable memory

#21 | 2014-09-04
US20140250340A1
Physics

Self monitoring and self repairing ECC

#22 | 2014-03-06
US20140068322A1
Physics

Implementing DRAM command timing adjustments to alleviate DRAM failures

#23 | 2014-01-23
US20140025223A1
Physics

Performance management of subsystems in a server by effective usage of resources

#24 | 2013-10-03
US20130262792A1
Physics

MEMORY DEVICE SUPPORT OF DYNAMICALLY CHANGING FREQUENCY IN MEMORY SYSTEMS

#25 | 2013-10-03
US20130262791A1
Physics

HOST-SIDE SUPPORT OF DYNAMICALLY CHANGING FREQUENCY IN MEMORY SYSTEMS

#26 | 2013-05-23
US20130128682A1
Physics

Memory system with dynamic refreshing

InventorID:

258979 ⎘