Inventor profile of:

Wei-Yip Loh

City:

Hsinchu

Country:

Taiwan

Published Applications:

46

Last publication date:

2026-04-30

Top Assignees for applications by Wei-Yip Loh

The entities that hold a legal rights for patent applications filed by inventor Loh Wei-Yip:

Recent patent applications by Loh Wei-Yip

Wei-Yip Loh from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-04-30
US20260123023A1
Electricity

SILICIDE REGIONS AND THE METHODS OF FORMING THE SAME

#2 | 2026-03-05
US20260068255A1
Electricity

SEMICONDUCTOR STRUCTURE WITH SIDEWALL-FREE DIPOLE METAL FEATURE AND METHOD FOR MANUFACTURING THE SAME

#3 | 2025-12-18
US20250385175A1
Electricity

SEMICONDUCTOR INTERCONNECTION STRUCTURES AND MANUFACTURING METHOD THEREOF

#4 | 2025-11-20
US20250359278A1
Electricity

SEMICONDUCTOR DEVICE WITH CONDUCTIVE LINERS OVER SILICIDE STRUCTURES AND METHOD OF MAKING THE SEMICONDUCTOR DEVICE

#5 | 2025-09-11
US20250287628A1
Electricity

Contact with a Silicide Region

#6 | 2025-09-11
US20250285962A1
Electricity

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

#7 | 2025-07-31
US20250246551A1
Electricity

Conductive Structures and Dielectric Structures in Interconnect Structures

#8 | 2025-07-17
US20250234629A1
Electricity

Contact Structures in Semiconductor Devices

#9 | 2025-05-15
US20250159965A1
Electricity

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES WITH MULTIPLE SILICIDE REGIONS

#10 | 2025-02-20
US20250063783A1
Electricity

CONTACT STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD

#11 | 2024-12-05
US20240405023A1
Electricity

SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

#12 | 2024-11-14
US20240379758A1
Electricity

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

#13 | 2024-10-03
US20240332076A1
Electricity

CONDUCTIVE FEATURE FORMATION AND STRUCTURE

#14 | 2024-09-05
US20240297228A1
Electricity

SELECTIVE SILICIDE FOR STACKED MULTI-GATE DEVICE

#15 | 2024-04-25
US20240136227A1
Electricity

Barrier-Free Approach for Forming Contact Plugs

#16 | 2024-04-25
US20240136226A1
Electricity

Semiconductor device pre-cleaning

#17 | 2023-12-21
US20230411496A1
Electricity

SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME

#18 | 2023-12-21
US20230411242A1
Electricity

Buried conductive structure in semiconductor substrate

#19 | 2023-12-14
US20230402366A1
Electricity

SEMICONDUCTOR DEVICE INCLUDING METAL SURROUNDING VIA CONTACT AND METHOD OF FORMING THE SEMICONDUCTOR DEVICE

#20 | 2023-11-16
US20230369130A1
Electricity

Method of manufacturing semiconductor devices with multiple silicide regions

#21 | 2023-11-16
US20230369055A1
Electricity

Deposition window enlargement

#22 | 2023-09-21
US20230299168A1
Electricity

SEMICONDUCTOR DEVICE WITH CONDUCTIVE LINERS OVER SILICIDE STRUCTURES AND METHOD OF MAKING THE SEMICONDUCTOR DEVICE

#23 | 2023-08-17
US20230260847A1
Electricity

Selective dual silicide formation

#24 | 2023-07-20
US20230230916A1
Electricity

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

#25 | 2023-06-15
US20230187201A1
Electricity

Treatment for adhesion improvement

#26 | 2023-02-23
US20230054633A1
Electricity

Selective dual silicide formation

#27 | 2022-11-17
US20220367667A1
Electricity

Contact with a Silicide Region

#28 | 2022-10-13
US20220328350A1
Electricity

Semiconductor device pre-cleaning

#29 | 2022-09-15
US20220293474A1
Electricity

Semiconductor devices with stacked silicide regions

#30 | 2022-09-01
US20220278199A1
Electricity

Contact structure for semiconductor device and method

#31 | 2022-09-01
US20220277997A1
Electricity

Barrier-free approach for forming contact plugs

#32 | 2022-05-12
US20220149519A1
Electricity

Ammonium fluoride pre-clean protection

#33 | 2021-12-30
US20210407808A1
Electricity

Deposition window enlargement

#34 | 2021-09-23
US20210296168A1
Electricity

Conductive feature formation and structure

#35 | 2021-04-22
US20210118994A1
Electricity

Contact structure for semiconductor device and method

#36 | 2021-02-04
US20210035868A1
Electricity

Method of manufacturing semiconductor devices with multiple silicide regions

#37 | 2021-02-04
US20210035861A1
Electricity

Barrier-free approach for forming contact plugs

#38 | 2020-12-10
US20200388485A1
Electricity

Treatment for adhesion improvement

#39 | 2020-05-14
US20200152763A1
Electricity

Contact with a silicide region

#40 | 2020-04-09
US20200111739A1
Electricity

Method for forming semiconductor contact structure

#41 | 2020-03-12
US20200083100A1
Electricity

Semiconductor structure

#42 | 2020-01-02
US20200006055A1
Electricity

Treatment for adhesion improvement

#43 | 2019-09-05
US20190273147A1
Electricity

Method of forming a contact with a silicide region

#44 | 2019-09-05
US20190273042A1
Electricity

Contact structure and the method of forming the same

#45 | 2019-09-05
US20190273023A1
Electricity

Conductive feature formation and structure

#46 | 2019-05-16
US20190148230A1
Electricity

Semiconductor structure and method for manufacturing the same

InventorID:

2605409 ⎘