Inventor profile of:

JUN HE

City:

HSINCHU

Country:

Taiwan

Published Applications:

22

Last publication date:

2026-06-04

Top Assignees for applications by JUN HE

The entities that hold a legal rights for patent applications filed by inventor HE JUN:

Recent patent applications by HE JUN

JUN HE from HSINCHU, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-06-04
US20260156780A1
Electricity

COOLING SYSTEMS FOR COMPUTER SYSTEM COMPONENTS AND METHODS OF OPERATING THE SAME

#2 | 2025-11-27
US20250364418A1
Electricity

GRAPHENE-CLAD METAL INTERCONNECT

#3 | 2025-11-27
US20250364384A1
Electricity

REDUCTION OF CRACKS IN REDISTRIBUTION STRUCTURE

#4 | 2025-11-20
US20250357458A1
Electricity

SEMICONDUCTOR PACKAGING

#5 | 2025-10-16
US20250323177A1
Electricity

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

#6 | 2025-02-27
US20250072028A1
Electricity

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME

#7 | 2024-11-14
US20240379825A1
Electricity

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME

#8 | 2024-10-31
US20240361380A1
Physics

Method and device for wafer-level testing

#9 | 2024-09-19
US20240310434A1
Physics

Method and system for wafer-level testing

#10 | 2024-02-22
US20240063099A1
Electricity

REDUCTION OF CRACKS IN REDISTRIBUTION STRUCTURE

#11 | 2024-02-01
US20240038701A1
Electricity

FAN-OUT PACKAGE STRUCTURES WITH CASCADED OPENINGS IN ENHANCEMENT LAYER

#12 | 2023-12-28
US20230420438A1
Electricity

SEMICONDUCTOR PACKAGING

#13 | 2023-12-14
US20230402385A1
Electricity

GRAPHENE-CLAD METAL INTERCONNECT

#14 | 2023-11-16
US20230366925A1
Physics

Method and device for wafer-level testing

#15 | 2023-08-10
US20230251306A1
Physics

Method and system for wafer-level testing

#16 | 2022-10-13
US20220326300A1
Physics

Method and device for wafer-level testing

#17 | 2022-10-06
US20220320319A1
Electricity

Semiconductor structure and manufacturing method of the same

#18 | 2021-11-18
US20210358808A1
Electricity

Stacked semiconductor devices and methods of forming thereof

#19 | 2021-10-07
US20210311110A1
Physics

Method and system for wafer-level testing

#20 | 2021-07-01
US20210199710A1
Physics

Method and device for wafer-level testing

#21 | 2020-04-02
US20200105600A1
Electricity

Dicing method for stacked semiconductor devices

#22 | 2020-02-27
US20200064396A1
Physics

Method and system for wafer-level testing

InventorID:

2656351 ⎘