Austin, Texas
United States
10
2026-03-05
The entities that hold a legal rights for patent applications filed by inventor Jayakumar Kannanthodath V.:
Kannanthodath V. Jayakumar from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
APPARATUS AND METHODS FOR JITTER TESTING OF CLOCK SIGNALS
#2 | 2025-06-26LINEAR PREDICTION TO SUPPRESS SPURS IN A DIGITAL PHASE-LOCKED LOOP
#3 | 2025-05-15MODIFIED CONTROL LOOP IN A DIGITAL PHASE-LOCKED LOOP
#4 | 2023-06-22Modified control loop in a digital phase-locked loop
#5 | 2023-03-30Linear prediction to suppress spurs in a digital phase-locked loop
#6 | 2022-04-21Jitter self-test using timestamps
#7 | 2021-06-10Jitter self-test using timestamps
#8 | 2021-05-27On-chip phase-locked loop response measurement
#9 | 2020-05-21Accurate and reliable digital PLL lock indicator
#10 | 2020-03-31Relative frequency offset error and phase error detection for clocks
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