Caserta
Italy
46
2026-04-30
The entities that hold a legal rights for patent applications filed by inventor Izzi Roberto:
Roberto Izzi from Caserta, IT has applied for patents for these inventions. The list has both pending applications and granted patents:
RELIABLE AND EFFICIENT BOOT LOGICAL UNIT ACCESS
#2 | 2026-03-12HARDWARE RESET MANAGEMENT FOR UNIVERSAL FLASH STORAGE
#3 | 2026-01-08MEMORY MANAGEMENT DURING SUSPEND AND RESUME OPERATIONS
#4 | 2026-01-08DETERMINING AVAILABLE RESOURCES FOR STORING DATA
#5 | 2026-01-08APPARATUS WITH ADAPTIVE POWER MANAGEMENT MECHANISM AND METHODS FOR OPERATING THE SAME
#6 | 2025-12-11LATENCY REDUCTION OF BOOT PROCEDURES FOR MEMORY SYSTEMS
#7 | 2025-12-04OUT-OF-ORDER PER-ZONE COMMAND HANDLING FOR ZONED MEMORY
#8 | 2025-09-04COMMANDED DEVICE STATES FOR A MEMORY SYSTEM
#9 | 2025-06-05CHANGE LOG COMPRESSION
#10 | 2025-05-29INTELLIGENT THROUGHPUT ROUTER
#11 | 2025-05-15DETECTING PAGE FAULT TRAFFIC
#12 | 2025-03-06TECHNIQUES FOR DETECTION OF SHUTDOWN PATTERNS
#13 | 2025-01-23MEMORY DEVICES INCLUDING IDLE TIME PREDICTION
#14 | 2024-12-05IDENTIFICATION AND STORAGE OF BOOT INFORMATION AT A MEMORY SYSTEM
#15 | 2024-10-17HARDWARE RESET MANAGEMENT FOR UNIVERSAL FLASH STORAGE
#16 | 2024-10-17READING SEQUENTIAL DATA USING MAPPING INFORMATION STORED AT A HOST DEVICE
#17 | 2024-10-17DETERMINING AVAILABLE RESOURCES FOR STORING DATA
#18 | 2024-08-22USAGE LEVEL IDENTIFICATION FOR MEMORY DEVICE ADDRESSES
#19 | 2024-08-22RELIABLE AND EFFICIENT BOOT LOGICAL UNIT ACCESS
#20 | 2024-06-06APP LAUNCH DETECTION FROM READ CHUNK ANALYSIS
#21 | 2024-05-30LATENCY REDUCTION OF BOOT PROCEDURES FOR MEMORY SYSTEMS
#22 | 2024-02-29Memory devices including idle time prediction
#23 | 2024-02-01Hardware reset management for universal flash storage
#24 | 2023-12-21Storage traffic pattern detection in memory devices
#25 | 2023-11-30Techniques for detection of shutdown patterns
#26 | 2023-11-23Commanded device states for a memory system
#27 | 2023-11-16Detecting page fault traffic
#28 | 2023-09-28DYNAMIC POWER MODES FOR BOOT-UP PROCEDURES
#29 | 2023-08-17Identification and storage of boot information at a memory system
#30 | 2023-06-22Data defragmentation for a system boot procedure having random indexes indicating a relationship between sequential logical addresses and random logical addresses
#31 | 2023-06-22Reading sequential data using mapping information stored at a host device
#32 | 2023-03-02Automotive boot optimization by utilizing multiple phases of boot-up procedures
#33 | 2023-03-02Determining available resources for storing data
#34 | 2022-11-03Techniques for memory system configuration using queue refill time
#35 | 2022-10-27Usage level identification for memory device addresses
#36 | 2022-10-27Detecting page fault traffic
#37 | 2022-10-20Storage traffic pattern detection in memory devices
#38 | 2022-06-16Unmap operation techniques
#39 | 2022-02-17Detecting page fault traffic
#40 | 2022-01-27Storage traffic pattern detection in memory devices
#41 | 2020-12-31HYBRID MEMORY SYSTEM
#42 | 2020-09-24Latency-based storage in a hybrid memory system
#43 | 2020-09-17Latency-based storage in a hybrid memory system
#44 | 2019-09-26Latency-based storage in a hybrid memory system
#45 | 2019-09-26Latency-based storage in a hybrid memory system
#46 | 2019-09-26Latency-based storage in a hybrid memory system
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