Inventor profile of:

Pete Michael Hippleheuser

City:

Murphy, Texas

Country:

United States

Published Applications:

46

Last publication date:

2025-11-13

Top Assignees for applications by Pete Michael Hippleheuser

The entities that hold a legal rights for patent applications filed by inventor Hippleheuser Pete Michael:

Recent patent applications by Hippleheuser Pete Michael

Pete Michael Hippleheuser from Murphy, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-11-13
US20250348438A1
Physics

METHODS AND APPARATUS TO FACILITATE WRITE MISS CACHING IN CACHE SYSTEM

#2 | 2025-10-30
US20250335372A1
Physics

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A COHERENT VICTIM CACHE WITH PARALLEL DATA PATHS

#3 | 2025-08-28
US20250272249A1
Physics

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

#4 | 2025-06-12
US20250190368A1
Physics

METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH

#5 | 2025-05-08
US20250147888A1
Physics

HARDWARE COHERENCE SIGNALING PROTOCOL

#6 | 2025-04-10
US20250117341A1
Physics

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

#7 | 2025-04-10
US20250117340A1
Physics

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

#8 | 2025-03-20
US20250094359A1
Physics

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

#9 | 2025-03-20
US20250094358A1
Physics

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRITE MERGING

#10 | 2025-01-30
US20250036573A1
Physics

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED DATA RAM CACHE FOR BANK ARBITRATION

#11 | 2025-01-23
US20250028651A1
Physics

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

#12 | 2025-01-23
US20250028645A1
Physics

METHODS AND APPARATUS FOR INFLIGHT DATA FORWARDING AND INVALIDATION OF PENDING WRITES IN STORE QUEUE

#13 | 2024-12-19
US20240419607A1
Physics

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SYSTEM

#14 | 2024-11-07
US20240370380A1
Physics

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A VICTIM CACHE

#15 | 2024-10-31
US20240362166A1
Physics

Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue

#16 | 2024-07-11
US20240232100A1
Physics

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-ALIGNED WRITES

#17 | 2024-06-13
US20240193098A1
Physics

Methods and apparatus to facilitate atomic operations in victim cache

#18 | 2024-05-02
US20240143516A1
Physics

Methods and apparatus for allocation in a victim cache system

#19 | 2024-03-21
US20240095164A1
Physics

Methods and apparatus for eviction in dual datapath victim cache system

#20 | 2024-02-08
US20240045803A1
Physics

Hardware coherence signaling protocol

#21 | 2024-01-25
US20240028523A1
Physics

Atomic compare and swap in a coherent cache system

#22 | 2024-01-18
US20240020242A1
Physics

Methods and apparatus to reduce bank pressure using aggressive write merging

#23 | 2023-12-14
US20230401162A1
Physics

Fully pipelined read-modify-write support

#24 | 2023-10-19
US20230333991A1
Physics

METHODS AND APPARATUS TO FACILITATE WRITE MISS CACHING IN CACHE SYSTEM

#25 | 2023-09-07
US20230281126A1
Physics

Methods and apparatus to facilitate read-modify-write support in a victim cache

#26 | 2023-07-27
US20230236974A1
Physics

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A COHERENT VICTIM CACHE WITH PARALLEL DATA PATHS

#27 | 2023-04-06
US20230108306A1
Physics

Atomic operations and histogram operations in a cache pipeline

#28 | 2023-02-02
US20230032348A1
Physics

Methods and apparatus for allocation in a victim cache system

#29 | 2022-11-24
US20220374362A1
Physics

Methods and apparatus to facilitate atomic operations in victim cache

#30 | 2022-06-30
US20220206949A1
Physics

Methods and apparatus for multi-banked victim cache with dual datapath

#31 | 2022-03-03
US20220066937A1
Physics

Hardware coherence signaling protocol

#32 | 2021-12-30
US20210406190A1
Physics

Methods and apparatus to facilitate atomic compare and swap in cache for a coherent level 1 data cache system

#33 | 2020-11-26
US20200371960A1
Physics

Methods and apparatus for allocation in a victim cache system

#34 | 2020-11-26
US20200371957A1
Physics

Methods and apparatus for multi-banked victim cache with dual datapath

#35 | 2020-11-26
US20200371956A1
Physics

Methods and apparatus to facilitate read-modify-write support in a victim cache

#36 | 2020-11-26
US20200371949A1
Physics

Methods and apparatus to facilitate atomic operations in victim cache

#37 | 2020-11-26
US20200371948A1
Physics

Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue

#38 | 2020-11-26
US20200371947A1
Physics

Methods and apparatus for eviction in dual datapath victim cache system

#39 | 2020-11-26
US20200371946A1
Physics

Methods and apparatus to reduce read-modify-write cycles for non-aligned writes

#40 | 2020-11-26
US20200371939A1
Physics

Methods and apparatus to facilitate fully pipelined read-modify-write support in level 1 data cache using store queue and data forwarding

#41 | 2020-11-26
US20200371938A1
Physics

Methods and apparatus for read-modify-write support in multi-banked data RAM cache for bank arbitration

#42 | 2020-11-26
US20200371932A1
Physics

Methods and apparatus to facilitate write miss caching in cache system

#43 | 2020-11-26
US20200371922A1
Physics

Methods and apparatus to facilitate atomic compare and swap in cache for a coherent level 1 data cache system

#44 | 2020-11-26
US20200371921A1
Physics

Methods and apparatus to reduce bank pressure using aggressive write merging

#45 | 2020-11-26
US20200371915A1
Physics

Methods and apparatus to facilitate an atomic operation and/or a histogram operation in cache pipeline

#46 | 2020-11-26
US20200371911A1
Physics

Methods and apparatus to facilitate read-modify-write support in a coherent victim cache with parallel data paths

InventorID:

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