Inventor profile of:

Simon DELEONIBUS

City:

Claix

Country:

France

Published Applications:

18

Last publication date:

2014-12-18

Top Assignees for applications by Simon DELEONIBUS

The entities that hold a legal rights for patent applications filed by inventor DELEONIBUS Simon:

Recent patent applications by DELEONIBUS Simon

Simon DELEONIBUS from Claix, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-12-18
US20140370678A1
Electricity

METHOD FOR PRODUCING A CONDUCTIVE NANOPARTICLE MEMORY DEVICE

#2 | 2013-06-20
US20130157426A1
Electricity

METHOD FOR PRODUCING A CONDUCTIVE NANOPARTICLE MEMORY DEVICE

#3 | 2012-04-19
US20120094479A1
Electricity

Method for making electrical interconnections with carbon nanotubes

#4 | 2011-02-10
US20110033996A1
Electricity

Method for producing a conductive nanoparticle memory device

#5 | 2008-08-21
US20080200001A1
Electricity

Method of producing a transistor

#6 | 2008-04-24
US20080096354A1
Electricity

Method for making a vertical MOS transistor with embedded gate

#7 | 2008-01-03
US20080001274A1
Electricity

Rectangular semi-conducting support for microelectronics and method for making same

#8 | 2007-10-25
US20070246702A1
Electricity

Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor

#9 | 2007-09-20
US20070218600A1
Electricity

Method for making a field effect transistor with diamond-like carbon channel and resulting transistor

#10 | 2007-09-20
US20070215941A1
Electricity

Semiconductor-On-Insulator Substrate Comprising A Buried Diamond-Like Carbon Layer And Method For Making Same

#11 | 2007-08-16
US20070187728A1
Electricity

Field effect transistor with suitable source, drain and channel materials and integrated circuit comprising same

#12 | 2007-01-04
US20070001239A1
Electricity

Mis transistor with self-aligned gate and method for making same

#13 | 2006-08-03
US20060172523A1
Electricity

Method for delineating a conducting element disposed on an insulating layer, device and transistor thus obtained

#14 | 2006-07-06
US20060148256A1
Electricity

Method for forming patterns aligned on either side of a thin film

#15 | 2006-04-04
US10486369
-

Field-effect transistor with horizontal self-aligned gates and the production method therefor

#16 | 2006-02-14
US10491265
-

Processes for making a single election transistor with a vertical channel

#17 | 2005-10-18
US10296201
-

Damascene architecture electronic storage and method for making same

#18 | 2005-03-15
US10030175
-

Method for making an electronic component with self-aligned drain and gate, in damascene architecture

InventorID:

300077 ⎘