Inventor profile of:

Thomas Ludwig

City:

Sindelfingen

Country:

Germany

Published Applications:

17

Last publication date:

2012-03-08

Top Assignees for applications by Thomas Ludwig

The entities that hold a legal rights for patent applications filed by inventor Ludwig Thomas:

Recent patent applications by Ludwig Thomas

Thomas Ludwig from Sindelfingen, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2012-03-08
US20120060139A1
Physics

Using port obscurity factors to improve routing

#2 | 2011-06-23
US20110154283A1
Physics

Shaping ports in integrated circuit design

#3 | 2011-05-12
US20110113395A1
Physics

Method, electronic design automation tool, computer program product, and data processing program for creating a layout for design representation of an electronic circuit and corresponding port for an electronic circuit

#4 | 2010-02-11
US20100037198A1
Physics

Port assignment in hierarchical designs by abstracting macro logic

#5 | 2009-09-17
US20090235215A1
Physics

Gridded glyph geometric objects (L3GO) design method

#6 | 2009-04-02
US20090089726A1
Physics

Layout quality gauge for integrated circuit design

#7 | 2009-02-26
US20090050975A1
Electricity

Active Silicon Interconnect in Merged Finfet Process

#8 | 2008-11-20
US20080286913A1
Electricity

Field effect transistor with raised source/drain fin straps

#9 | 2008-09-04
US20080211517A1
Physics

Measurement arrangement for determining the characteristic line parameters by measuring scattering parameters

#10 | 2008-06-12
US20080136423A1
Physics

Measurement Arrangement for Determining the Characteristic line Parameters by Measuring Scattering Parameters

#11 | 2008-03-20
US20080067613A1
Electricity

Field effect transistor with raised source/drain fin straps

#12 | 2008-02-21
US20080042202A1
Electricity

QUASI SELF-ALIGNED SOURCE/DRAIN FinFET PROCESS

#13 | 2008-01-10
US20080006852A1
Electricity

Dense chevron finFET and method of manufacturing same

#14 | 2007-05-17
US20070108536A1
Electricity

Quasi self-aligned source/drain FinFET process

#15 | 2007-03-22
US20070063276A1
Electricity

Dense chevron finFET and method of manufacturing same

#16 | 2005-06-23
US20050136582A1
Electricity

Method and device for automated layer generation for double-gate FinFET designs

#17 | 2005-06-21
US10249738
-

Multi-height FinFETS

InventorID:

3117240 ⎘