Inventor profile of:

Martin VORBACH

City:

Munich

Country:

Germany

Published Applications:

40

Last publication date:

2017-07-06

Top Assignees for applications by Martin VORBACH

The entities that hold a legal rights for patent applications filed by inventor VORBACH Martin:

Recent patent applications by VORBACH Martin

Martin VORBACH from Munich, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-07-06
US20170192481A1
Physics

Methods and devices for treating and processing data

#2 | 2014-12-04
US20140359254A1
Physics

Logical cell array and bus system

#3 | 2014-07-24
US20140208143A1
Physics

Multiprocessor having runtime adjustable clock and clock dependent power supply

#4 | 2012-07-24
US10009649
-

Method for interleaving a program over a plurality of cells

#5 | 2012-06-14
US20120151113A1
Physics

BUS SYSTEMS AND METHODS FOR CONTROLLING DATA FLOW IN A FIELD OF PROCESSING ELEMENTS

#6 | 2012-03-29
US20120079327A1
Physics

Method for debugging reconfigurable architectures

#7 | 2011-11-03
US20110271264A1
Physics

Method for the translation of programs for reconfigurable architectures

#8 | 2011-07-14
US20110173389A1
Physics

METHODS AND DEVICES FOR TREATING AND/OR PROCESSING DATA

#9 | 2011-06-30
US20110161977A1
Physics

METHOD AND DEVICE FOR DATA PROCESSING

#10 | 2011-06-23
US20110148460A1
Physics

Reconfigurable sequencer structure

#11 | 2011-06-16
US20110145547A1
Physics

Reconfigurable elements

#12 | 2011-03-10
US20110060942A1
Physics

Processor arrangement on a chip including data processing, memory, and interface elements

#13 | 2011-01-20
US20110012640A1
Physics

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS

#14 | 2011-01-13
US20110006805A1
Physics

Multi-core processing system

#15 | 2010-11-11
US20100287324A1
Physics

Processor chip including a plurality of cache elements connected to a plurality of processor cores

#16 | 2010-09-09
US20100228918A1
Physics

Configurable logic integrated circuit having a multidimensional structure of configurable elements

#17 | 2010-07-08
US20100174868A1
Physics

Processor device having a sequential data processing unit and an arrangement of data processing elements

#18 | 2010-06-17
US20100153654A1
Physics

Data processing method and device

#19 | 2010-04-15
US20100095094A1
Physics

METHOD FOR PROCESSING DATA

#20 | 2010-04-15
US20100095088A1
Physics

Reconfigurable elements

#21 | 2010-03-18
US20100070671A1
Physics

Method and device for processing data

#22 | 2010-02-18
US20100039139A1
Physics

Reconfigurable sequencer structure

#23 | 2010-02-02
US10480003
-

Method for processing data

#24 | 2009-12-03
US20090300262A1
Physics

METHODS AND DEVICES FOR TREATING AND/OR PROCESSING DATA

#25 | 2009-08-18
US10487681
-

Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization

#26 | 2009-06-11
US20090150725A1
Physics

Method for debugging reconfigurable architectures

#27 | 2009-02-05
US20090037865A1
Physics

Router

#28 | 2008-08-14
US20080191737A1
Physics

Reconfigurable sequencer structure

#29 | 2007-06-28
US20070150637A1
Physics

Bus systems and reconfiguration methods

#30 | 2007-03-01
US20070050603A1
Physics

Data processing method and device

#31 | 2006-11-02
US20060248317A1
Physics

Method and device for processing data

#32 | 2006-11-02
US20060245225A1
Physics

Device including a field having function cells and information providing cells controlled by the function cells

#33 | 2006-08-31
US20060192586A1
Physics

Reconfigurable sequencer structure

#34 | 2006-04-27
US20060090062A1
Physics

Reconfigurable general purpose processor having time restricted configurations

#35 | 2006-04-06
US20060075211A1
Physics

Method and device for data processing

#36 | 2005-06-16
US20050132344A1
Physics

Method of compilation

#37 | 2005-04-21
US20050086649A1
Physics

Method for the translation of programs for reconfigurable architectures

#38 | 2005-04-21
US20050086462A1
Physics

Methods and devices for treating and/or processing data

#39 | 2005-03-10
US20050053056A1
Physics

Router

#40 | 2005-01-27
US20050022062A1
Physics

Method for debugging reconfigurable architectures

InventorID:

3133642 ⎘