Boeblingen
Germany
42
2022-03-31
The entities that hold a legal rights for patent applications filed by inventor Nerz Bernd:
Bernd Nerz from Boeblingen, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Directed interrupt virtualization with interrupt table
#2 | 2022-02-03Directed interrupt virtualization with fallback
#3 | 2022-01-13Directed interrupt for multilevel virtualization with interrupt table
#4 | 2022-01-06Directed interrupt virtualization with running indicator
#5 | 2021-10-14Directed interrupt for multilevel virtualization
#6 | 2021-08-19Directed interrupt virtualization
#7 | 2021-04-22Directed interrupt virtualization with interrupt table
#8 | 2021-02-25Interrupt signaling for directed interrupt virtualization
#9 | 2020-12-24Self-managed lock access
#10 | 2020-08-20Directed interrupt virtualization with blocking indicator
#11 | 2020-08-20Directed interrupt for multilevel virtualization with interrupt table
#12 | 2020-08-20Directed interrupt for multilevel virtualization
#13 | 2020-08-20Directed interrupt virtualization
#14 | 2020-08-20Directed interrupt virtualization with interrupt table
#15 | 2020-08-20Directed interrupt virtualization with fallback
#16 | 2020-08-20Interrupt signaling for directed interrupt virtualization
#17 | 2020-08-20Directed interrupt virtualization with running indicator
#18 | 2019-06-13Set buffer state instruction
#19 | 2019-02-28Instruction for performing a pseudorandom number generate operation
#20 | 2018-09-27Instruction for performing a pseudorandom number generate operation
#21 | 2018-04-05Instruction for performing a pseudorandom number seed operation
#22 | 2018-04-05Instruction to provide true random numbers
#23 | 2017-02-09Instruction for performing a pseudorandom number seed operation
#24 | 2016-08-11Set buffer state instruction
#25 | 2016-07-14Instruction for performing a pseudorandom number generate operation
#26 | 2016-04-28Resource mapping in multi-threaded central processor units
#27 | 2016-04-28Resource mapping in multi-threaded central processor units
#28 | 2016-04-14Efficient interruption routing for a multithreaded processor
#29 | 2015-11-12Interpreting I/O operation requests from pageable guests without host intervention
#30 | 2015-03-19Instruction for performing a pseudorandom number seed operation
#31 | 2015-02-26Interpreting I/O operation requests from pageable guests without host intervention
#32 | 2015-02-19Instruction for performing a pseudorandom number generate operation
#33 | 2014-09-18Instruction for performing a pseudorandom number seed operation
#34 | 2014-09-18Instruction for performing a pseudorandom number generate operation
#35 | 2013-11-14Interpreting I/O operation requests from pageable guests without host intervention
#36 | 2013-06-27Dequeue operation using mask vector to manage input/output interruptions
#37 | 2012-08-23Interpreting I/O operation requests from pageable guests without host intervention
#38 | 2011-07-14Interpreting I/O operation requests from pageable guests without host intervention
#39 | 2011-03-03Conversion of cryptographic key protection
#40 | 2009-08-27System, method and computer program product for translating storage elements
#41 | 2009-04-30Apparatus and method for operating a symmetric cipher engine in cipher-block chaining mode
#42 | 2005-12-29Interpreting I/O operation requests from pageable guests without host intervention
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