Monte Sereno, California
United States
25
2013-02-12
The entities that hold a legal rights for patent applications filed by inventor Nequist Eric:
Eric Nequist from Monte Sereno, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method and mechanism for implementing extraction for an integrated circuit design
#2 | 2012-11-20Method and mechanism for implementing extraction for an integrated circuit design
#3 | 2012-05-24Method and mechanism for identifying and tracking shape connectivity
#4 | 2012-03-13Method and mechanism for identifying and tracking shape connectivity
#5 | 2011-12-22Method and system for implementing efficient locking to facilitate parallel processing of IC designs
#6 | 2011-06-28Method and system for implementing partial reconfiguration and rip-up of routing
#7 | 2011-04-21Method and system for model-based routing of an integrated circuit
#8 | 2011-01-11Method and mechanism for implementing extraction for an integrated circuit design
#9 | 2010-05-25System and method for layout optimization using model-based verification
#10 | 2010-05-18Method and system for implementing edge optimization on an integrated circuit design
#11 | 2010-02-16Method and mechanism for identifying and tracking shape connectivity
#12 | 2010-02-02Method and system for implementing routing refinement and timing convergence
#13 | 2009-11-03Representation, configuration, and reconfiguration of routing method and system
#14 | 2009-09-15Method and system for implementing layout, placement, and routing with merged shapes
#15 | 2009-08-06Method, system, and computer program product for improved electrical analysis
#16 | 2009-07-02Method and mechanism for performing clearance-based zoning
#17 | 2009-07-02Method and system for implementing efficient locking to facilitate parallel processing of IC designs
#18 | 2009-04-02Method and mechanism for identifying and tracking shape connectivity
#19 | 2008-12-02Method and mechanism for determining shape connectivity
#20 | 2008-07-03Method and system for model-based routing of an integrated circuit
#21 | 2008-07-03Method and system for model-based design and layout of an integrated circuit
#22 | 2006-08-29Hierarchical gcell method and mechanism
#23 | 2006-08-29Zone tree method and mechanism
#24 | 2006-01-03Shape abstraction mechanism
#25 | 2005-12-27Nearest neighbor mechanism
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