Holger SCHUEHRER

Semiconductor devices having through-contacts and related fabrication methods

Contact optimization for enhancing stress transfer in closely spaced transistors

Void sealing in a dielectric material of a contact level of a semiconductor device comprising closely spaced transistors

Reducing metal voids in a metallization layer stack of a semiconductor device by providing a dielectric barrier layer

Method and apparatus for reducing semiconductor package tensile stress

Reducing contamination of semiconductor substrates during BEOL processing by performing a deposition/etch cycle during barrier deposition

Semiconductor substrate having a protection layer at the substrate back side

Test structure for determining characteristics of semiconductor alloys in SOI transistors by x-ray diffraction

Technique for non-destructive metal delamination monitoring in semiconductor devices

Method of reducing contamination by providing an etch stop layer at the substrate edge

Method for removing a passivation layer prior to depositing a barrier layer in a copper metallization layer

Method and semiconductor structure for monitoring the fabrication of interconnect structures and contacts in a semiconductor device

Method of reducing contamination by removing an interlayer dielectric from the substrate edge

Technique for forming self-aligned vias in a metallization layer

Method of forming electrical connections in a semiconductor structure

Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress

Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer