Inventor profile of:

Hong MA

City:

SINGAPORE

Country:

Singapore

Published Applications:

15

Last publication date:

2023-07-20

Top Assignees for applications by Hong MA

The entities that hold a legal rights for patent applications filed by inventor MA Hong:

Recent patent applications by MA Hong

Hong MA from SINGAPORE, SG has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-07-20
US20230232629A1
Electricity

METHOD AND APPARATUS TO MITIGATE WORD LINE STAIRCASE ETCH STOP LAYER THICKNESS VARIATIONS IN 3D NAND DEVICES

#2 | 2022-12-22
US20220406352A1
Physics

DUMMY WORDLINE CONTACTS TO IMPROVE ETCH MARGIN OF SEMI-ISOLATED WORDLINES IN STAIRCASE STRUCTURES

#3 | 2011-01-27
US20110021021A1
Electricity

Method of fabricating dual damascene structure

#4 | 2010-09-09
US20100227131A1
Electricity

Test pattern structure

#5 | 2010-02-18
US20100040982A1
Electricity

Method for forming an opening

#6 | 2009-12-24
US20090314743A1
Electricity

METHOD OF ETCHING A DIELECTRIC LAYER

#7 | 2009-10-15
US20090259330A1
Electricity

Method of controlling result parameter of IC manufacturing procedure

#8 | 2009-01-22
US20090023287A1
Electricity

Via-first interconnection process using gap-fill during trench formation

#9 | 2009-01-22
US20090023283A1
Electricity

INTERCONNECTION PROCESS

#10 | 2008-08-21
US20080200025A1
Electricity

Method of forming composite opening and method of dual damascene process using the same

#11 | 2008-07-17
US20080171434A1
Electricity

Method of fabricating dual damascene structure

#12 | 2008-07-03
US20080160652A1
Electricity

Two-step method for etching a fuse window on a semiconductor substrate

#13 | 2008-06-05
US20080132067A1
Electricity

Method for fabricating a dual damascene structure

#14 | 2007-01-11
US20070010092A1
Electricity

Method for eliminating bridging defect in via first dual damascene process

#15 | 2006-09-14
US20060206228A1
Electricity

Method of processing semiconductor wafer