Inventor profile of:

Dirk Michel

City:

Austin, Texas

Country:

United States

Published Applications:

53

Last publication date:

2021-07-08

Top Assignees for applications by Dirk Michel

The entities that hold a legal rights for patent applications filed by inventor Michel Dirk:

Recent patent applications by Michel Dirk

Dirk Michel from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-07-08
US20210208926A1
Physics

Suppressing interrupts to an application thread

#2 | 2020-09-24
US20200301735A1
Physics

Hardware thread switching for scheduling policy in a processor

#3 | 2018-10-25
US20180307637A1
Physics

Preventing software thread blocking due to interrupts

#4 | 2018-01-04
US20180004574A1
Physics

Averting lock contention associated with core-based hardware threading in a split core environment

#5 | 2018-01-04
US20180004571A1
Physics

Averting lock contention associated with core-based hardware threading in a split core environment

#6 | 2016-09-22
US20160275025A1
Physics

Preventing software thread blocking due to interrupts

#7 | 2016-09-22
US20160275024A1
Physics

Preventing software thread blocking due to interrupts

#8 | 2016-05-26
US20160147653A1
Physics

Filtering multiple in-memory trace buffers for event ranges before dumping from memory

#9 | 2015-06-18
US20150169350A1
Physics

Closed-loop feedback mechanism for achieving optimum performance in a consolidated workload environment

#10 | 2015-06-18
US20150169347A1
Physics

Closed-loop feedback mechanism for achieving optimum performance in a consolidated workload environment

#11 | 2015-04-23
US20150113226A1
Physics

Management of file cache

#12 | 2015-04-23
US20150113225A1
Physics

Management of file cache

#13 | 2015-03-03
US14100087
Physics

Adaptive lock list searching of waiting threads

#14 | 2015-02-10
US14076223
Physics

Adaptive lock list searching of waiting threads

#15 | 2014-05-29
US20140149675A1
Physics

Selective release-behind of pages based on repaging history in an information handling system

#16 | 2014-05-29
US20140149672A1
Physics

Selective release-behind of pages based on repaging history in an information handling system

#17 | 2014-04-10
US20140101662A1
Physics

Efficient lock hand-off in a symmetric multiprocessor system

#18 | 2013-10-31
US20130290666A1
Physics

Demand based memory management of non-pagable data storage

#19 | 2013-09-26
US20130254775A1
Physics

Efficient lock hand-off in a symmetric multiprocessing system

#20 | 2013-08-29
US20130227549A1
Physics

Managing utilization of physical processors of a shared processor pool in a virtualized processor environment

#21 | 2013-07-11
US20130179616A1
Physics

Partitioned shared processor interrupt-intensive task segregator

#22 | 2012-11-01
US20120278809A1
Physics

LOCK BASED MOVING OF THREADS IN A SHARED PROCESSOR PARTITIONING ENVIRONMENT

#23 | 2012-08-16
US20120210331A1
Physics

PROCESSOR RESOURCE CAPACITY MANAGEMENT IN AN INFORMATION HANDLING SYSTEM

#24 | 2012-08-09
US20120204186A1
Physics

PROCESSOR RESOURCE CAPACITY MANAGEMENT IN AN INFORMATION HANDLING SYSTEM

#25 | 2012-03-22
US20120072676A1
Physics

Selective memory compression for multi-threaded applications

#26 | 2012-01-05
US20120005448A1
Physics

Demand-based memory management of non-pagable data storage

#27 | 2011-10-06
US20110246800A1
Physics

Optimizing power management in multicore virtual machine platforms by dynamically variable delay before switching processor cores into a low power state

#28 | 2011-06-30
US20110161539A1
Physics

Lock mechanism to reduce waiting of threads to access a shared resource by selectively granting access to a thread before an enqueued highest priority thread

#29 | 2011-06-23
US20110153975A1
Physics

Prioritizing virtual real memory paging based on disk capabilities

#30 | 2011-05-12
US20110113214A1
Physics

Information handling system memory management

#31 | 2009-08-27
US20090217276A1
Physics

Lock based moving of threads in a shared processor partitioning environment

#32 | 2009-06-02
US12170218
-

Method for preventing page replacement of unreferenced read-ahead file pages

#33 | 2008-10-16
US20080256324A1
Physics

Implementing a fast file synchronization in a data processing system

#34 | 2008-09-18
US20080225724A1
Electricity

Acknowledging packet receipt based on expected size of sender's congestion window

#35 | 2008-07-24
US20080178183A1
Physics

Scheduling threads in a multi-processor computer

#36 | 2008-07-03
US20080163217A1
Physics

Optimized preemption and reservation of software locks for woken threads

#37 | 2008-06-19
US20080148274A1
Physics

Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval

#38 | 2008-04-24
US20080098397A1
Physics

System and method for CPI load balancing in SMT processors

#39 | 2008-03-20
US20080072228A1
Physics

System and method for delayed priority boost

#40 | 2007-10-18
US20070245041A1
Physics

Method to improve system DMA mapping while substantially reducing memory fragmentation

#41 | 2007-10-02
US10422037
-

System and method for adding priority change value corresponding with a lock to a thread during lock processing

#42 | 2007-06-14
US20070136725A1
Physics

System and method for optimized preemption and reservation of software locks

#43 | 2007-05-03
US20070101052A1
Physics

System and method for implementing a fast file synchronization in a data processing system

#44 | 2007-03-15
US20070058531A1
Electricity

TCP/IP method FPR determining the expected size of conjestion windows

#45 | 2006-02-16
US20060037017A1
Physics

System, apparatus and method of reducing adverse performance impact due to migration of processes from one CPU to another

#46 | 2006-02-16
US20060036810A1
Physics

System, application and method of reducing cache thrashing in a multi-processor with a shared cache on which a disruptive process is executing

#47 | 2005-12-15
US20050278488A1
Physics

Method and apparatus for dynamic hosting partition page assignment

#48 | 2005-11-03
US20050246461A1
Physics

Scheduling threads in a multi-processor computer

#49 | 2005-09-08
US20050198386A1
Electricity

User defined preferred DNS reference

#50 | 2005-04-21
US20050086660A1
Physics

System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval

#51 | 2005-04-14
US20050081183A1
Physics

System and method for CPI load balancing in SMT processors

#52 | 2005-01-27
US20050022186A1
Physics

System for delaying priority boost in a priority offset amount only after detecting of preemption event during access to critical section

#53 | 2005-01-06
US20050005080A1
Physics

Page replacement with a re-reference indicator

InventorID:

338076 ⎘