Inventor profile of:

Mark S. Fredrickson

City:

Rochester, Minnesota

Country:

United States

Published Applications:

23

Last publication date:

2023-09-28

Top Assignees for applications by Mark S. Fredrickson

The entities that hold a legal rights for patent applications filed by inventor Fredrickson Mark S.:

Recent patent applications by Fredrickson Mark S.

Mark S. Fredrickson from Rochester, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-09-28
US20230308457A1
Electricity

Sound-based presentation attack detection

#2 | 2022-06-09
US20220182371A1
Electricity

Authorizing uses of goods or services using bonding agreement

#3 | 2021-05-20
US20210151081A1
Physics

Authenticating digital recordings

#4 | 2020-09-24
US20200304495A1
Electricity

Network-based authorization for disconnected devices

#5 | 2020-02-06
US20200042434A1
Physics

Analysis of verification parameters for training reduction

#6 | 2019-08-29
US20190267036A1
Physics

Authenticating digital recordings

#7 | 2019-07-11
US20190213050A1
Physics

Techniques for faster loading of data for accelerators

#8 | 2016-11-22
US15000895
Physics

Communicating in an integrated circuit using hardware-managed virtual channels

#9 | 2015-12-10
US20150355673A1
Physics

Delayed execution of program code on multiple processors

#10 | 2014-07-10
US20140195777A1
Physics

VARIABLE DEPTH INSTRUCTION FIFOS TO IMPLEMENT SIMD ARCHITECTURE

#11 | 2013-07-11
US20130179720A1
Physics

Methods and systems with delayed execution of multiple processors

#12 | 2009-07-09
US20090178014A1
Physics

Heuristic clustering of circuit elements in a circuit design

#13 | 2008-12-11
US20080307281A1
Physics

TRADING PROPENSITY-BASED CLUSTERING OF CIRCUIT ELEMENTS IN A CIRCUIT DESIGN

#14 | 2008-06-12
US20080141210A1
Physics

AUTOMATIC BACK ANNOTATION OF A FUNCTIONAL DEFINITION OF AN INTEGRATED CIRCUIT DESIGN BASED UPON PHYSICAL LAYOUT

#15 | 2008-06-05
US20080133992A1
Physics

Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain

#16 | 2008-02-28
US20080052472A1
Physics

Methods and apparatus for reducing command processing latency while maintaining coherence

#17 | 2007-11-08
US20070260949A1
Physics

Trading propensity-based clustering of circuit elements in a circuit design

#18 | 2007-08-09
US20070186204A1
Physics

Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout

#19 | 2007-08-09
US20070186199A1
Physics

Heuristic clustering of circuit elements in a circuit design

#20 | 2007-08-09
US20070186052A1
Physics

Methods and apparatus for reducing command processing latency while maintaining coherence

#21 | 2007-07-19
US20070168797A1
Physics

Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree

#22 | 2007-05-03
US20070101221A1
Physics

Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain

#23 | 2007-03-29
US20070073949A1
Physics

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InventorID:

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