Inventor profile of:

Daniel C. Guterman

City:

Fremont, California

Country:

United States

Published Applications:

98

Last publication date:

2011-06-16

Top Assignees for applications by Daniel C. Guterman

The entities that hold a legal rights for patent applications filed by inventor Guterman Daniel C.:

Recent patent applications by Guterman Daniel C.

Daniel C. Guterman from Fremont, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2011-06-16
US20110141816A1
Physics

Tracking cells for a memory system

#2 | 2011-04-28
US20110099438A1
Physics

Methods of cell population distribution assisted read margining

#3 | 2010-08-12
US20100205360A1
Physics

Removable Mother/Daughter Peripheral Card

#4 | 2010-08-12
US20100202199A1
Physics

Tracking cells for a memory system

#5 | 2010-07-01
US20100169561A1
Physics

Removable Mother/Daughter Peripheral Card

#6 | 2010-07-01
US20100169559A1
Physics

Removable Mother/Daughter Peripheral Card

#7 | 2010-02-18
US20100039859A1
Physics

System and method for programming cells in non-volatile integrated memory devices

#8 | 2010-01-28
US20100020616A1
Physics

Soft errors handling in EEPROM devices

#9 | 2009-12-03
US20090296469A1
Physics

Alternate row-based reading and writing for non-volatile memory

#10 | 2009-11-19
US20090286370A1
Electricity

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#11 | 2009-10-29
US20090268518A1
Electricity

Multi-state memory

#12 | 2009-06-16
US10874825
-

Soft errors handling in EEPROM devices

#13 | 2008-10-28
US10809572
-

Multi-state memory

#14 | 2008-09-04
US20080212374A1
Electricity

Multi-state memory

#15 | 2008-06-26
US20080155380A1
Physics

Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data

#16 | 2008-06-05
US20080130364A1
Electricity

Novel Multi-State Memory

#17 | 2008-05-22
US20080119026A1
Electricity

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#18 | 2008-05-22
US20080116509A1
Electricity

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#19 | 2008-04-15
US10866554
-

Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data

#20 | 2008-03-27
US20080077842A1
Physics

Memory with cell population distribution assisted read margining

#21 | 2008-03-27
US20080077841A1
Physics

Methods of cell population distribution assisted read margining

#22 | 2008-03-20
US20080068891A1
Physics

Boosting to control programming of non-volatile memory

#23 | 2008-03-06
US20080056003A1
Physics

Concurrent programming of non-volatile memory

#24 | 2008-03-06
US20080056002A1
Physics

Concurrent programming of non-volatile memory

#25 | 2008-03-06
US20080055994A1
Physics

Concurrent programming of non-volatile memory

#26 | 2008-02-28
US20080049506A1
Physics

Alternate row-based reading and writing for non-volatile memory

#27 | 2008-02-21
US20080043529A1
Electricity

Multi-state memory

#28 | 2007-10-04
US20070234144A1
Physics

Smart verify for multi-state memories

#29 | 2007-09-27
US20070226434A1
Physics

Data recovery in a memory system using tracking cells

#30 | 2007-09-20
US20070217259A1
Physics

Tracking cells for a memory system

#31 | 2007-08-23
US20070195602A1
Physics

Reducing floating gate to floating gate coupling effect

#32 | 2007-07-05
US20070153583A1
Physics

Alternate row-based reading and writing for non-volatile memory

#33 | 2007-07-05
US20070153577A1
Physics

Systems for alternate row-based reading and writing for non-volatile memory

#34 | 2007-06-26
US10461244
-

Tracking cells for a memory system

#35 | 2007-06-14
US20070136639A1
Physics

Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system

#36 | 2007-06-14
US20070133279A1
Physics

Reducing the effects of noise in non-volatile memories through multiple reads

#37 | 2007-05-31
US20070121383A1
Physics

Behavior based programming of non-volatile memory

#38 | 2007-05-24
US20070118713A1
Physics

Memory system for legacy hosts

#39 | 2007-05-17
US20070109858A1
Physics

Method and structure for efficient data verification operation for non-volatile memories

#40 | 2007-04-26
US20070091685A1
Physics

Efficient verification for coarse/fine programming of non-volatile memory

#41 | 2007-04-26
US20070091681A1
Physics

Non-Volatile Memory With Improved Programming and Method Therefor

#42 | 2007-04-05
US20070076510A1
Physics

Method of reducing disturbs in non-volatile memory

#43 | 2007-03-15
US20070058436A1
Physics

Efficient verification for coarse/fine programming of non volatile memory

#44 | 2007-01-18
US20070016704A1
Physics

Removable Mother/Daughter Peripheral Card

#45 | 2007-01-04
US20070002633A1
Physics

Non-Volatile Memory with Improved Programming and Method Therefor

#46 | 2006-12-28
US20060291285A1
Physics

System and method for programming cells in non-volatile integrated memory devices

#47 | 2006-11-14
US10050429
-

Removable mother/daughter peripheral card

#48 | 2006-10-26
US20060239079A1
Physics

Noise reduction technique for transistors and small devices utilizing an episodic agitation

#49 | 2006-10-05
US20060221700A1
Physics

Charge packet metering for coarse/fine programming of non-volatile memory

#50 | 2006-09-14
US20060203563A1
Physics

Charge packet metering for coarse/fine programming of non-volatile memory

#51 | 2006-09-07
US20060198192A1
Physics

Boosting to control programming of non-volatile memory

#52 | 2006-07-27
US20060163645A1
Electricity

EEPROM with split gate source side injection

#53 | 2006-07-20
US20060161749A1
Physics

Delivery of a message to a user of a portable data storage device as a condition of its use

#54 | 2006-07-04
US10314055
-

Smart verify for multi-state memories

#55 | 2006-07-04
US9386170
-

EEPROM with split gate source side infection with sidewall spacers

#56 | 2006-06-29
US20060140011A1
Physics

Reducing floating gate to floating gate coupling effect

#57 | 2006-06-15
US20060129751A1
Electricity

Multi-state memory

#58 | 2006-05-18
US20060107136A1
Physics

Smart verify for multi-state memories

#59 | 2006-03-30
US20060067121A1
Physics

Variable current sinking for coarse/fine programming of non-volatile memory

#60 | 2006-03-09
US20060050561A1
Physics

Bitline governed approach for programming non-volatile memory

#61 | 2006-02-23
US20060039198A1
Physics

Bitline governed approach for coarse/fine programming

#62 | 2006-02-16
US20060034124A1
Electricity

Multi-state memory

#63 | 2006-02-02
US20060023507A1
Physics

Method of reducing disturbs in non-volatile memory

#64 | 2005-12-27
US10734667
-

Removable mother/daughter peripheral card

#65 | 2005-12-15
US20050276108A1
Physics

Concurrent programming of non-volatile memory

#66 | 2005-12-06
US10360829
-

Method and structure for efficient data verification operation for non-volatile memories

#67 | 2005-11-24
US20050259472A1
Physics

Reducing the effects of noise in non-volatile memories through multiple reads

#68 | 2005-11-10
US20050248989A1
Physics

Bitline governed approach for program control of non-volatile memory

#69 | 2005-11-10
US20050248988A1
Physics

Boosting to control programming of non-volatile memory

#70 | 2005-10-13
US20050226055A1
Physics

Programming inhibit for non-volatile memory

#71 | 2005-10-11
US10225105
-

EEPROM with split gate source side injection with sidewall spacers

#72 | 2005-10-04
US10799416
-

Reducing the effects of noise in non-volatile memories through multiple reads

#73 | 2005-09-29
US20050213361A1
Physics

Non-volatile memory with improved programming and method therefor

#74 | 2005-09-08
US20050195653A1
Physics

Method and structure for efficient data verification operation for non-volatile memories

#75 | 2005-08-18
US20050180211A1
Electricity

Multi-state memory

#76 | 2005-08-18
US20050180210A1
Electricity

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#77 | 2005-08-04
US20050169051A1
Physics

Writable tracking cells

#78 | 2005-08-02
US10280352
-

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#79 | 2005-07-28
US20050162924A1
Physics

Variable current sinking for coarse/fine programming of non-volatile memory

#80 | 2005-07-28
US20050162923A1
Physics

Charge packet metering for coarse/fine programming of non-volatile memory

#81 | 2005-07-28
US20050162916A1
Physics

Efficient verification for coarse/fine programming of non-volatile memory

#82 | 2005-07-21
US20050157551A1
Electricity

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#83 | 2005-07-07
US20050146933A1
Physics

Method of reducing disturbs in non-volatile memory

#84 | 2005-05-24
US10002696
-

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

#85 | 2005-05-17
US10841370
-

Removable mother/daughter peripheral card

#86 | 2005-05-17
US10427602
-

Multi-state memory

#87 | 2005-05-03
US10613098
-

Method of reducing disturbs in non-volatile memory

#88 | 2005-04-21
US20050083735A1
Physics

Behavior based programming of non-volatile memory

#89 | 2005-04-21
US20050083726A1
Physics

Soft errors handling in EEPROM devices

#90 | 2005-03-29
US10692922
-

Writable tracking cells

#91 | 2005-03-17
US20050058008A1
Physics

Soft errors handling in EEPROM devices

#92 | 2005-03-17
US20050057979A1
Physics

Noise reduction technique for transistors and small devices utilizing an episodic agitation

#93 | 2005-03-01
US10788184
-

Multi-state memory

#94 | 2005-03-01
US10674737
-

Eeprom with split gate source side injection

#95 | 2005-02-15
US10013592
-

Multi-state memory

#96 | 2005-02-01
US10052924
-

Noise reduction technique for transistors and small devices utilizing an episodic agitation

#97 | 2005-01-27
US20050018481A1
Electricity

Multi-state memory

#98 | 2005-01-06
US20050002233A1
Electricity

Multi-state memory

InventorID:

3402313 ⎘