Inventor profile of:

Noboru Sakimura

City:

Tokyo

Country:

Japan

Published Applications:

56

Last publication date:

2024-07-18

Top Assignees for applications by Noboru Sakimura

The entities that hold a legal rights for patent applications filed by inventor Sakimura Noboru:

Recent patent applications by Sakimura Noboru

Noboru Sakimura from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-07-18
US20240241232A1
Physics

IMAGING DEVICE AND IMAGING METHOD

#2 | 2022-07-28
US20220236414A1
Physics

MEASUREMENT DEVICE, MEASUREMENT METHOD, AND PROGRAM

#3 | 2019-02-14
US20190052273A1
Electricity

Programmable logic integrated circuit, semiconductor device, and characterization method

#4 | 2018-06-07
US20180157779A1
Physics

Programmable logic integrated circuit, design support system, and configuration method

#5 | 2018-05-03
US20180123595A1
Electricity

Reconfigurable circuit with crossbar switches including non-volatile resistive switches

#6 | 2018-04-05
US20180096724A1
Physics

Crossbar switch type memory circuit, look-up table circuit, and programming method

#7 | 2017-09-14
US20170262044A1
Physics

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND RECORDING MEDIUM

#8 | 2017-08-31
US20170249981A1
Physics

Magnetic memory and method for writing data into magnetic memory element

#9 | 2017-03-09
US20170070228A1
Electricity

Programmable logic integrated circuit

#10 | 2016-10-13
US20160300614A1
Physics

Content addressable memory cell and content addressable memory

#11 | 2016-03-17
US20160077563A1
Physics

Semiconductor integrated circuit and power supply control method therefor

#12 | 2015-09-03
US20150248939A1
Physics

Magnetic-domain-wall-displacement memory cell and initializing method therefor

#13 | 2015-08-20
US20150235703A1
Physics

Nonvolatile content addressable memory and method for operating same

#14 | 2015-05-21
US20150138877A1
Physics

Nonvolatile logic gate device

#15 | 2015-02-19
US20150048680A1
Electricity

Semiconductor device, power supply control method of semiconductor device, and sensor node

#16 | 2015-02-12
US20150042376A1
Electricity

Nonvolatile resistor network assembly and nonvolatile logic gate with increased fault tolerance using the same

#17 | 2014-10-23
US20140313843A1
Physics

SEMICONDUCTOR INTEGRATED CIRCUIT AND CONTROL METHOD THEREFOR

#18 | 2014-08-21
US20140233304A1
Physics

Semiconductor device and control method of the same

#19 | 2013-07-18
US20130182501A1
Electricity

Semiconductor storage device and its manufacturing method

#20 | 2013-07-18
US20130181739A1
Electricity

Semiconductor device and semiconductor device control method

#21 | 2012-08-16
US20120206959A1
Electricity

Magnetic memory cell and magnetic random access memory

#22 | 2012-03-15
US20120063199A1
Physics

SEMICONDUCTOR DEVICE

#23 | 2011-12-01
US20110292718A1
Physics

Non-volatile logic circuit

#24 | 2011-06-23
US20110148458A1
Electricity

Magnetoresistive element, logic gate and method of operating logic gate

#25 | 2011-01-20
US20110016371A1
Physics

Semiconductor storage device and method of operating the same

#26 | 2010-10-28
US20100271866A1
Electricity

Nonvolatile latch circuit

#27 | 2010-10-21
US20100265760A1
Physics

Nonvolatile latch circuit and logic circuit using the same

#28 | 2010-09-23
US20100238719A1
Physics

Magnetic random access memory and operating method of the same

#29 | 2010-07-22
US20100182824A1
Electricity

Magnetic random access memory

#30 | 2010-07-15
US20100177558A1
Physics

MRAM having variable word line drive potential

#31 | 2010-04-22
US20100097845A1
Physics

Semiconductor storage device

#32 | 2010-04-22
US20100097108A1
Physics

Semiconductor device

#33 | 2010-03-18
US20100067292A1
Physics

Semiconductor integrated circuit

#34 | 2010-02-25
US20100046284A1
Electricity

MRAM

#35 | 2010-02-25
US20100046283A1
Physics

Magnetic random access memory and operation method of the same

#36 | 2009-12-03
US20090296454A1
Electricity

Magnetic memory cell and magnetic random access memory

#37 | 2009-10-22
US20090262571A1
Physics

Magnetic random access memory and operating method of magnetic random access memory

#38 | 2009-06-25
US20090161423A1
Performing operations; transporting

Magnetic random access memory

#39 | 2009-06-04
US20090141544A1
Physics

MRAM and operation method of the same

#40 | 2009-05-14
US20090125787A1
Physics

Operation method of MRAM including correcting data for single-bit error and multi-bit error

#41 | 2009-05-14
US20090122597A1
Electricity

Magnetic random access memory

#42 | 2009-01-08
US20090010044A1
Physics

Toggle magnetic random access memory and write method of toggle magnetic random access memory

#43 | 2008-11-20
US20080285360A1
Physics

Resistance change semiconductor memory device and method of reading data with a first and second switch circuit

#44 | 2008-04-24
US20080094880A1
Physics

Magneto resistance element and magnetic random access memory

#45 | 2008-04-17
US20080089117A1
Electricity

Memory cell and magnetic random access memory

#46 | 2007-08-30
US20070201168A1
Electricity

Magnetization direction control method and application thereof to MRAM

#47 | 2007-08-23
US20070195585A1
Physics

Toggle-type magnetoresistive random access memory

#48 | 2007-07-12
US20070159876A1
Physics

Magnetic random access memory and operating method of the same

#49 | 2007-02-27
US10702655
-

Magnetic memory cell and magnetic random access memory using the same

#50 | 2006-10-12
US20060227598A1
Physics

Magnetic random access memory with improved data reading method

#51 | 2006-07-20
US20060158945A1
Physics

Semiconductor memory device having a voltage-controlled-oscillator-based readout circuit

#52 | 2006-06-15
US20060126377A1
Physics

Semiconductor storage apparatus

#53 | 2006-05-11
US20060098477A1
Physics

Magnetic random access memory

#54 | 2006-01-24
US10329463
-

Semiconductor memory device using tunneling magnetoresistive elements

#55 | 2005-04-26
US10609906
-

Magnetic random access memory including a cell array having a magneto-resistance element

#56 | 2005-02-03
US20050024950A1
Physics

Readout circuit for semiconductor memory device based on a number of pulses generated by a voltage-controlled oscillator

InventorID:

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