Santa Clara, California
United States
27
2026-04-07
The entities that hold a legal rights for patent applications filed by inventor Mohan Jitendra:
Jitendra Mohan from Santa Clara, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Virtual metadata storage with decode-alias mitigation
#2 | 2025-05-01VIRTUAL METADATA STORAGE
#3 | 2025-04-15Low-latency retimer with seamless clock switchover
#4 | 2024-11-12Low-latency signaling-link retimer
#5 | 2023-12-26Low-latency retimer with seamless clock switchover
#6 | 2022-11-01Low-latency retimer with seamless clock switchover
#7 | 2022-05-10Configurable-aggregation retimer with media-dedicated controllers
#8 | 2022-02-22Low-latency signaling-link retimer
#9 | 2021-10-19Low-latency retimer with seamless clock switchover
#10 | 2014-10-28System and method for adding a low data rate data channel to a 100Base-T ethernet link
#11 | 2011-09-29Low voltage differential signal driver with reduced power consumption
#12 | 2010-09-21System and method for providing a strobed comparator with reduced offset and reduced charge kickback
#13 | 2009-12-08Driver for vertical-cavity surface-emitting laser and method
#14 | 2009-03-10Method of using low bandwidth sensor for measuring high frequency AC modulation amplitude
#15 | 2009-01-13Apparatus and method for loss of signal detection in a receiver
#16 | 2009-01-06Apparatus and method for high-speed serial communications
#17 | 2008-10-07Two-layer electrical substrate for optical devices
#18 | 2008-07-01Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register
#19 | 2008-02-19Method of sensing VCSEL light output power by monitoring electrical characteristics of the VCSEL
#20 | 2007-05-29AC/DC coupling input network with low-power common-mode correction for current-mode-logic drivers
#21 | 2007-04-24Differential amplifier with increased common mode loop gain at low frequencies
#22 | 2007-04-24Combined analog signal gain controller and equalizer
#23 | 2006-09-12Configuration for dockable portable computers using a single ethernet physical layer chip and transformer
#24 | 2006-08-29Electrical interconnect with minimal parasitic capacitance
#25 | 2005-11-29Inductive-capacitive (LC) based quadrature voltage controlled oscillator (VCO) with deterministic quadrature signal phase relationship
#26 | 2005-09-27Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio
#27 | 2005-08-16Band-gap reference circuit with averaged current mirror offsets and method
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