Brackenheim
Germany
28
2011-10-27
The entities that hold a legal rights for patent applications filed by inventor Dudek Volker:
Volker Dudek from Brackenheim, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
Low leakage FINFETs
#2 | 2009-11-05Method and system for incorporating high voltage devices in an EEPROM
#3 | 2008-11-27DMOS DEVICE WITH SEALED CHANNEL PROCESSING
#4 | 2008-11-13Electrostatic discharge (ESD) protection structure and a circuit using the same
#5 | 2008-07-24REDUCED ELECTRIC FIELD DMOS USING SELF-ALIGNED TRENCH ISOLATION
#6 | 2007-11-15High-voltage field-effect transistor
#7 | 2007-10-11Lateral DMOS transistor and method for the production thereof
#8 | 2007-10-04Method and manufacturing low leakage MOSFETs and FinFETs
#9 | 2007-09-27DMOS device with sealed channel processing
#10 | 2007-09-06REGISTRATION MARK WITHIN AN OVERLAP OF DOPANT REGIONS
#11 | 2007-08-09MOS transistor and method for producing a MOS transistor structure
#12 | 2007-05-31Electrostatic discharge (ESD) protection structure and a circuit using the same
#13 | 2007-04-26Method and system for incorporating high voltage devices in an EEPROM
#14 | 2007-03-01Registration mark within an overlap of dopant regions
#15 | 2007-01-25Methods of forming reduced electric field DMOS using self-aligned trench isolation
#16 | 2006-12-14Method for manufacturing a metal-semiconductor contact in semiconductor components
#17 | 2006-12-14Integrated circuit and method for manufacturing an integrated circuit
#18 | 2006-11-16Integrated circuit having laterally dielectrically isolated active regions above an electrically contacted buried material, and method for producing the same
#19 | 2006-10-05ESD protection circuit with scalable current capacity and voltage capacity
#20 | 2006-10-05Method for manufacturing a bipolar transistor and bipolar transistor manufactured by the method
#21 | 2006-05-25MOS transistor with reduced kink effect and method for the manufacture thereof
#22 | 2006-02-09Circuit layout with active components and high breakdown voltage
#23 | 2005-08-04Method of producing active semiconductor layers of different thicknesses in an SOI wafer
#24 | 2005-08-04Process for manufacturing vertically insulated structural components on SOI material of various thickness
#25 | 2005-08-04MOS transistor and method for producing a MOS transistor structure
#26 | 2005-05-05Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate
#27 | 2005-03-24Method of fabricating a semiconductor component with active regions separated by isolation trenches
#28 | 2005-03-24DMOS-transistor with lateral dopant gradient in drift region and method of producing the same
3461380 ⎘