Inventor profile of:

Emil Lambrache

City:

Campbell, California

Country:

United States

Published Applications:

22

Last publication date:

2011-09-08

Top Assignees for applications by Emil Lambrache

The entities that hold a legal rights for patent applications filed by inventor Lambrache Emil:

Recent patent applications by Lambrache Emil

Emil Lambrache from Campbell, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2011-09-08
US20110219160A1
Physics

FAST TWO WIRE INTERFACE AND PROTOCOL FOR TRANSFERRING DATA

#2 | 2010-01-21
US20100014354A1
Physics

Use of recovery transistors during write operations to prevent disturbance of unselected cells

#3 | 2009-12-24
US20090319760A1
Physics

SINGLE-CYCLE LOW POWER CPU ARCHITECTURE

#4 | 2008-10-23
US20080259712A1
Physics

Fast read port for register file

#5 | 2008-09-18
US20080229075A1
Physics

Microcontroller with low-cost digital signal processing extensions

#6 | 2008-09-18
US20080229067A1
Physics

Switching data pointers based on context

#7 | 2008-07-10
US20080164911A1
Electricity

High voltage tolerant port driver

#8 | 2008-05-08
US20080106949A1
Physics

Array source line (AVSS) controlled high voltage regulation for programming flash or EE array

#9 | 2007-08-16
US20070189092A1
Physics

Fast read port for register file

#10 | 2007-08-16
US20070189090A1
Physics

Fast read port for register file

#11 | 2007-07-26
US20070171756A1
Physics

Double byte select high voltage line for EEPROM memory block

#12 | 2007-07-19
US20070168731A1
Physics

Dual CPU on-chip-debug low-gate-count architecture with real-time-data tracing

#13 | 2007-06-21
US20070140002A1
Physics

Use of recovery transistors during write operations to prevent disturbance of unselected cells

#14 | 2007-06-14
US20070136565A1
Physics

Stack underflow debug with sticky base

#15 | 2007-06-14
US20070133340A1
Physics

Automatic address transition detection (ATD) control for reduction of sense amplifier power consumption

#16 | 2007-05-29
US11325132
-

Layout reduction by sharing a column latch per two bit lines

#17 | 2007-05-24
US20070115728A1
Physics

Array source line (AVSS) controlled high voltage regulation for programming flash or EE array

#18 | 2007-05-03
US20070096779A1
Electricity

High voltage tolerant port driver

#19 | 2006-12-28
US20060294275A1
Physics

Fast two wire interface and protocol for transferring data

#20 | 2006-09-07
US20060200650A1
Physics

Single-cycle low-power CPU architecture

#21 | 2006-09-07
US20060198204A1
Physics

Fast read port for register file

#22 | 2005-05-26
US20050114567A1
Physics

Serial peripheral interface (SPI) apparatus with write buffer for improving data throughput

InventorID:

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