Inventor profile of:

Paul E. Dahlen

City:

Rochester, Minnesota

Country:

United States

Published Applications:

22

Last publication date:

2021-04-15

Top Assignees for applications by Paul E. Dahlen

The entities that hold a legal rights for patent applications filed by inventor Dahlen Paul E.:

Recent patent applications by Dahlen Paul E.

Paul E. Dahlen from Rochester, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-04-15
US20210112661A1
Electricity

Surface mount device placement to control a signal path in a printed circuit board

#2 | 2021-04-08
US20210102977A1
Physics

SPUR DETECTION IN A SAMPLED WAVEFORM IN A MIXED ANALOG/DIGITAL SYSTEM USING THE PHASE OF THE FREQUENCY RESPONSE

#3 | 2021-04-08
US20210102976A1
Physics

Spur detection in a sampled waveform in a mixed analog/digital system using the magnitude of the frequency response

#4 | 2010-02-04
US20100031376A1
Physics

Continuity check monitoring for microchip exploitation detection

#5 | 2010-02-04
US20100031375A1
Physics

Signal quality monitoring to defeat microchip exploitation

#6 | 2010-02-04
US20100026506A1
Physics

Capacitance-based microchip exploitation detection

#7 | 2010-02-04
US20100026337A1
Physics

Interdependent Microchip Functionality for Defeating Exploitation Attempts

#8 | 2010-02-04
US20100026336A1
Physics

False connection for defeating microchip exploitation

#9 | 2010-02-04
US20100026326A1
Physics

Resistance sensing for defeating microchip exploitation

#10 | 2010-02-04
US20100026313A1
Electricity

Capacitance structures for defeating microchip tampering

#11 | 2010-02-04
US20100025864A1
Electricity

SHIELDED WIREBOND

#12 | 2010-02-04
US20100025479A1
Physics

Doped implant monitoring for microchip tamper detection

#13 | 2009-12-10
US20090305463A1
Electricity

System and Method for Thermal Optimized Chip Stacking

#14 | 2009-07-23
US20090183364A1
Electricity

METHOD OF CONNECTING A SERIES OF INTEGRATED DEVICES UTILIZING FLEXIBLE CIRCUITS IN A SEMI-STACKING CONFIGURATION

#15 | 2009-07-16
US20090179669A1
Physics

Techniques for providing switchable decoupling capacitors for an integrated circuit

#16 | 2009-03-26
US20090079060A1
Electricity

Method and structure for dispensing chip underfill through an opening in the chip

#17 | 2009-03-05
US20090058425A1
Physics

METHOD AND APPARATUS TO TEST ELECTRICAL CONTINUITY AND REDUCE LOADING PARASITICS ON HIGH-SPEED SIGNALS

#18 | 2009-02-26
US20090055134A1
Physics

System and method for implementing optimized creation of openings for de-gassing in an electronic package

#19 | 2009-01-29
US20090031067A1
Physics

Spider web interconnect topology utilizing multiple port connection

#20 | 2008-11-06
US20080276214A1
Electricity

METHOD AND COMPUTER PROGRAM FOR AUTOMATED ASSIGNMENT AND INTERCONNECTION OF DIFFERENTIAL PAIRS WITHIN AN ELECTRONIC PACKAGE

#21 | 2008-06-26
US20080151658A1
Physics

Using common mode differential data signals of DDR2 SDRAM for control signal transmission

#22 | 2007-11-15
US20070263475A1
Physics

Using common mode differential data signals of DDR2 SDRAM for control signal transmission

InventorID:

3583101 ⎘