Hae-Rang Choi

DATA RECEIVER OF SEMICONDUCTOR INTEGRATED CIRCUIT

Data output buffer circuit

Semiconductor integrated circuit

Semiconductor memory apparatus

Power noise detecting device and power noise control device using the same

Semiconductor IC device having power-sharing and method of power-sharing thereof

DELAY LOCKED LOOP CIRCUIT AND DELAY LOCKING METHOD

Voltage level comparison circuit of semiconductor memory apparatus, voltage adjustment circuit using voltage level comparison circuit, and semiconductor memory apparatus using the same

Semiconductor integrated circuit capable of overcoming clock signal jitter

Duty cycle correction circuit and semiconductor integrated circuit apparatus including the same

APPARATUS FOR SUPPLYING POWER IN SEMICONDUCTOR INTEGRATED CIRCUIT AND INPUT IMPEDANCE CONTROL METHOD OF THE SAME

Duty cycle correction circuit with reduced current consumption

DUTY CYCLE CORRECTION CIRCUIT AND METHOD FOR CORRECTING DUTY CYCLE

Receiver circuit

DUTY RATIO CORRECTION CIRCUIT

Data receiver of semiconductor integrated circuit

DATA RECEIVER OF SEMICONDUCTOR INTEGRATED CIRCUIT

Receiver circuit of semiconductor memory apparatus

Data receiver of semiconductor integrated circuit and method for controlling the same

Data center tracking circuit and semiconductor integrated circuit including the same

Low power, high speed receiver circuit for use in a semiconductor integrated circuit

Data relay apparatus and semiconductor integrated circuit having the same

Data output circuit for semiconductor memory apparatus

RECEIVER CIRCUIT

Receiver circuit of semiconductor memory apparatus

Receiver circuit for use in a semiconductor integrated circuit

CLOCK GENERATING CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS