GOWRISHANKAR L. CHINDALORE

Semiconductor device having different non-volatile memories having nanocrystals of differing densities and method therefor

Split-gate non-volatile memory cells having improved overlap tolerance

Split-gate non-volatile memory cell having improved overlap tolerance and method therefor

Method of programming a non-volatile memory

Method of making a split gate memory cell

Split-gate non-volatile memory cell and method

Virtual ground memory array and method therefor

Method of forming a split gate non-volatile memory cell

Method for integrating NVM circuitry with logic circuitry

Split gate device and method for forming

Electronic device including a nonvolatile memory array and methods of using the same

Non-volatile memory device with improved data retention and method therefor

Bit cell reference device and methods thereof

Electronic device including a memory array and conductive lines

Method of fabricating a storage device including decontinuous storage elements within and between trenches

Method for multiple step programming a memory cell

Memory cell using a dielectric having non-uniform thickness

Split gate memory cell in a FinFET

Electronic device with a multi-gated electrode structure and a process for forming the electronic device

Back-gated semiconductor device with a storage layer and methods for forming thereof

Floating gate non-volatile memory and method thereof

Programming and erasing structure for a floating gate memory cell and method of making

Nanocrystal bitcell process integration for high density application

Non-volatile memory cell array for improved data retention and method of operating thereof

Method for maintaining topographical uniformity of a semiconductor memory array

Source side injection storage device with spacer gates and method therefor

One time programmable memory and method of operation

Process for forming an electronic device including discontinuous storage elements

Process for forming an electronic device including discontinuous storage elements

Source side injection storage device with spacer gates and method therefor

Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench

Programmable structure including nanocrystal storage elements in a trench

Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming

Process for forming an electronic device including discontinuous storage elements

Process for operating an electronic device including a memory array and conductive lines

Electronic device including discontinuous storage elements

Electronic device including gate lines, bit lines, or a combination thereof

Nonvolatile storage array with continuous control gate employing hot carrier injection programming

Electronic device including discontinuous storage elements and a process for forming the same

Electronic device including discontinuous storage elements

Programmable structure including discontinuous storage elements and spacer control gates in a trench

Electronic device including discontinuous storage elements

Source side injection storage device with control gates adjacent to shared source/drain and method therefor

Method and apparatus for maintaining topographical uniformity of a semiconductor memory array

Source side injection storage device with spacer gates and method therefor

Method of forming a semiconductor device in a semiconductor layer and structure thereof

Method of forming a nanocluster charge storage device

Method for forming a multi-bit non-volatile memory device

Electronic device including an array and process for forming the same

Virtual ground memory array and method therefor

Programming and erasing structure for a floating gate memory cell and method of making

Programming and erasing structure for a floating gate memory cell and method of making

Programming, erasing, and reading structure for an NVM cell

Programming and erasing structure for an NVM cell

Non-volatile memory having a reference transistor and method for forming

Method for removing nanoclusters from selected regions

Method for forming a memory structure using a modified surface topography and structure thereof

Non-volatile memory having a bias on the source electrode for HCI programming

Non-volatile memory device and method for forming

Non-volatile memory having a reference transistor

Programming of a memory with discrete charge storage elements

Variable gate bias for a reference transistor in a non-volatile memory