Xinlin Wang

Method and structure for pFET junction profile with SiGe channel

Wrap-around fin for contacting a capacitor strap of a DRAM

Structure and method for making low leakage and low mismatch NMOSFET

Structure and method for Vt tuning and short channel control with high k/metal gate MOSFETs

Method and structure for pFET junction profile with SiGe channel

Structure and method for making low leakage and low mismatch NMOSFET

Multilayer storage class memory using externally heated phase change material

FIELD EFFECT TRANSISTOR WITH REDUCED OVERLAP CAPACITANCE

Hybrid SOI/bulk semiconductor transistors

Hybrid orientation SOI substrates, and method for forming the same

Method of making double-gated self-aligned finFET having gates of different lengths

MOSFET STRUCTURE WITH ULTRA-LOW K SPACER

Hybrid SOI-bulk semiconductor transistors

BORON DOPED SiGe HALO FOR NFET TO CONTROL SHORT CHANNEL EFFECT

Hybrid orientation SOI substrates, and method for forming the same

Structure and method of making double-gated self-aligned finFET having gates of different lengths

MOSFET structure with ultra-low K spacer

Connection device with actuating element for changing a conductive state of a via

Circuit and method of controlling integrated circuit power consumption using phase change switches

Apparatus and method for staircase raised source/drain structure

Hybrid SOI/bulk semiconductor transistors

Method of fabricating a connection device

Thin channel FET with recessed source/drains and extensions