Inventor profile of:

Matt E. Schwab

City:

Boise, Idaho

Country:

United States

Published Applications:

37

Last publication date:

2019-08-15

Top Assignees for applications by Matt E. Schwab

The entities that hold a legal rights for patent applications filed by inventor Schwab Matt E.:

Recent patent applications by Schwab Matt E.

Matt E. Schwab from Boise, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2019-08-15
US20190252281A1
Electricity

Packaged semiconductor components having substantially rigid support members

#2 | 2019-03-14
US20190081015A1
Electricity

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#3 | 2018-07-26
US20180211896A1
Electricity

Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components

#4 | 2018-02-08
US20180040582A1
Electricity

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#5 | 2016-09-01
US20160254204A1
Electricity

Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components

#6 | 2015-12-17
US20150364403A1
Electricity

Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components

#7 | 2015-01-22
US20150021769A1
Electricity

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#8 | 2013-08-01
US20130193581A1
Electricity

Packaged microdevices and methods for manufacturing packaged microdevices

#9 | 2011-09-29
US20110233740A1
Electricity

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#10 | 2011-05-05
US20110104857A1
Electricity

Packaged microdevices and methods for manufacturing packaged microdevices

#11 | 2010-10-07
US20100255636A1
Electricity

PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING SEMICONDUCTOR COMPONENTS

#12 | 2010-04-01
US20100078792A1
Electricity

Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices

#13 | 2010-03-04
US20100055837A1
Electricity

Multi-chip module and methods

#14 | 2009-01-08
US20090008797A1
Electricity

Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices

#15 | 2008-09-18
US20080224329A1
Electricity

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

#16 | 2008-09-18
US20080224291A1
Electricity

Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components

#17 | 2008-09-09
US10118366
-

Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices

#18 | 2008-02-28
US20080048316A1
Electricity

Packaged microdevices and methods for manufacturing packaged microdevices

#19 | 2006-12-12
US10286181
-

Fabricating a carrier substrate by using a solder resist opening as a combination pin one indicator and fiducial

#20 | 2006-11-23
US20060261492A1
Electricity

Multi-chip module and methods

#21 | 2006-08-22
US10646420
-

Methods for designing bond pad rerouting elements for use in stacked semiconductor device assemblies and for assembling semiconductor devices

#22 | 2006-07-27
US20060166404A1
Electricity

Methods for designing bond pad rerouting elements for use in stacked semiconductor device assemblies and for assembling semiconductor devices

#23 | 2006-06-29
US20060141673A1
Electricity

Integrated circuit device having reduced bow and method for making same

#24 | 2006-06-01
US20060113650A1
Electricity

Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element

#25 | 2006-03-28
US10285881
-

Solder resist opening to define a combination pin one indicator and fiducial

#26 | 2006-03-21
US10286156
-

Method of fabricating a semiconductor device package

#27 | 2006-02-07
US10299504
-

Methods for fabricating routing elements for multichip modules

#28 | 2006-01-17
US10646966
-

Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element

#29 | 2005-07-21
US20050156295A1
Electricity

Routing element for use in semiconductor device assemblies

#30 | 2005-07-21
US20050156293A1
Electricity

Routing element for use in multi-chip modules, multi-chip modules including the routing element and methods

#31 | 2005-07-07
US20050146009A1
Electricity

Multi-chip module and methods

#32 | 2005-05-03
US10412064
-

Method for making an integrated circuit package having reduced bow

#33 | 2005-04-19
US9942183
-

Routing element for use in multi-chip modules, multi-chip modules including the routing element, and methods

#34 | 2005-03-15
US10118401
-

Multi-chip module and methods

#35 | 2005-02-03
US20050023653A1
Electricity

Integrated circuit device having reduced bow and method for making same

#36 | 2005-02-03
US20050022379A1
Electricity

Method of making a semiconductor device having an opening in a solder mask

#37 | 2005-01-20
US20050014348A1
Electricity

Method of making a semiconductor device having an opening in a solder mask

InventorID:

361371 ⎘