Inventor profile of:

Jonathan J. DeMent

City:

Austin, Texas

Country:

United States

Published Applications:

19

Last publication date:

2010-09-30

Top Assignees for applications by Jonathan J. DeMent

The entities that hold a legal rights for patent applications filed by inventor DeMent Jonathan J.:

Recent patent applications by DeMent Jonathan J.

Jonathan J. DeMent from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2010-09-30
US20100250943A1
Electricity

Method for security in electronically fused encryption keys

#2 | 2009-12-31
US20090327680A1
Physics

Selecting a random processor to boot on a multiprocessor system

#3 | 2009-04-30
US20090112550A1
Physics

Generating a worst case current waveform for testing of integrated circuit devices

#4 | 2009-02-26
US20090055640A1
Physics

Masking a hardware boot sequence

#5 | 2008-11-04
US11758034
-

System and method for sorting processors based on thermal design point

#6 | 2008-10-16
US20080256366A1
Physics

Booting a multiprocessor device based on selection of encryption keys to be provided to processors

#7 | 2008-09-18
US20080229092A1
Physics

Secure boot across a plurality of processors

#8 | 2008-09-04
US20080215874A1
Physics

Masking a boot sequence by providing a dummy processor

#9 | 2008-07-10
US20080168318A1
Physics

Voltage identifier sorting

#10 | 2008-05-08
US20080109585A1
Physics

System and method for reducing store latency in symmetrical multiprocessor systems

#11 | 2008-04-17
US20080092006A1
Physics

Optimizing a Set of LBIST Patterns to Enhance Delay Fault Coverage

#12 | 2008-02-07
US20080034193A1
Physics

System and Method for Providing a Mediated External Exception Extension for a Microprocessor

#13 | 2007-12-27
US20070300053A1
Physics

System and method for masking a hardware boot sequence

#14 | 2007-12-13
US20070288762A1
Physics

Masking a boot sequence by providing a dummy processor

#15 | 2007-12-13
US20070288761A1
Physics

SYSTEM AND METHOD FOR BOOTING A MULTIPROCESSOR DEVICE BASED ON SELECTION OF ENCRYPTION KEYS TO BE PROVIDED TO PROCESSORS

#16 | 2007-12-13
US20070288740A1
Physics

SYSTEM AND METHOD FOR SECURE BOOT ACROSS A PLURALITY OF PROCESSORS

#17 | 2007-12-13
US20070288739A1
Physics

SYSTEM AND METHOD FOR MASKING A BOOT SEQUENCE BY RUNNING DIFFERENT CODE ON EACH PROCESSOR

#18 | 2007-12-13
US20070288738A1
Physics

SYSTEM AND METHOD FOR SELECTING A RANDOM PROCESSOR TO BOOT ON A MULTIPROCESSOR SYSTEM

#19 | 2007-05-17
US20070113044A1
Physics

Preloading translation buffers

InventorID:

3663669 ⎘